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authorStephen Warren <swarren@nvidia.com>2016-06-21 12:51:49 -0600
committerThierry Reding <treding@nvidia.com>2016-07-11 16:48:09 +0200
commitaee7a747af6cb9631d608e3a3e4db34eaba65b1f (patch)
treeaf7b4ef552d2f5864a7ac1e6ee782fdb61d010c3 /arch/arm/boot/dts/tegra124-jetson-tk1.dts
parent4ec2e60186034d54745d8ee45441dc33acef2e9c (diff)
ARM: tegra: Import latest Jetson TK1 spreadsheet
This imports v11 of "Jetson TK1 Development Platform Pin Mux" from https://developer.nvidia.com/embedded/downloads. The new version defines the mux option for the MIPI pad ctrl selection. The OWR pin no longer has an entry in the configuration table because the only mux option it support is OWR, that feature isn't supported, and hence can't conflict with any other pin. This pin can only usefully be used as a GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-jetson-tk1.dts')
-rw-r--r--arch/arm/boot/dts/tegra124-jetson-tk1.dts12
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index f6f5d3ca6f7d..9ce385e3aca5 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -1356,14 +1356,6 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
- owr {
- nvidia,pins = "owr";
- nvidia,function = "rsvd2";
- nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
- nvidia,tristate = <TEGRA_PIN_ENABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
- };
clk_32k_in {
nvidia,pins = "clk_32k_in";
nvidia,function = "clk";
@@ -1378,6 +1370,10 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
+ dsi_b {
+ nvidia,pins = "mipi_pad_ctrl_dsi_b";
+ nvidia,function = "dsi_b";
+ };
};
};