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authorRoger Quadros <rogerq@ti.com>2016-02-23 18:37:25 +0200
committerTony Lindgren <tony@atomide.com>2016-02-26 10:32:14 -0800
commit44e4716499b8988a20ba99ba5c871cdbf1c819fd (patch)
treed1c4994201c69bbfa7d8d4443e2533d9dfd059c3 /arch/arm/boot/dts/omap3-beagle.dts
parent6607fac8f45a33a2b66c64c90d7c37d39d6f0d69 (diff)
ARM: dts: omap3: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt resource to NAND controller nodes. The GPMC node will provide an interrupt controller for the NAND IRQs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-beagle.dts')
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 8ba465d57635..4602866792be 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -384,8 +384,11 @@
/* Chip select 0 */
nand@0,0 {
+ compatible = "ti,omap2-nand";
reg = <0 0 4>; /* NAND I/O window, 4 bytes */
- interrupts = <20>;
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "ham1";
nand-bus-width = <16>;
#address-cells = <1>;