diff options
| author | Troy Kisky <troy.kisky@boundarydevices.com> | 2013-12-12 18:49:06 -0700 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-09 21:29:18 +0800 |
| commit | da08d27fcd4691a7fe0d191604313be910029af3 (patch) | |
| tree | faa457ff022dbde3c0a3716c0d80658d9d95b2bc /arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | |
| parent | 1efa12657cc93ca35fb0eb7b96441e643c583ab2 (diff) | |
ARM: dts: imx6qdl-sabrelite: Add uart1 support
Uart1 is available on Sabre Lite.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index ab99c595c466..2a0c5fbbf6cb 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -170,6 +170,13 @@ >; }; + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 @@ -241,6 +248,12 @@ status = "okay"; }; +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; |