diff options
| author | Peter Seiderer <ps.report@gmx.net> | 2015-06-02 21:07:16 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2015-07-15 10:20:32 +0800 |
| commit | 3e22339487c914d38e08215cae3d1d219af99aff (patch) | |
| tree | 9a7469d519d6d7ba2d5b9d0ea402b7975ce4cda3 /arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | |
| parent | 93db055d418386174347ca52ea4728c6ae2e00aa (diff) | |
ARM: dts: nitrogen6x: add CAN support
Regulator stuff copied from imx6qdl-tx6.dtsi, pin configuration
taken from Boundary Devices linux kernel tree ([1] and [2]).
[1] https://github.com/boundarydevices/linux-imx6/blob/boundary-imx_3.10.17_1.0.2_ga/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
[2] https://github.com/boundarydevices/linux-imx6/blob/boundary-imx_3.10.17_1.0.2_ga/arch/arm/boot/dts/imx6qdl.dtsi
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi index 3af16dfe417b..67c76888dab3 100644 --- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi @@ -54,6 +54,17 @@ gpio = <&gpio3 22 0>; enable-active-high; }; + + reg_can_xcvr: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "CAN XCVR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_xcvr>; + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; + }; }; gpio-keys { @@ -149,6 +160,13 @@ status = "okay"; }; +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + xceiver-supply = <®_can_xcvr>; + status = "okay"; +}; + &ecspi1 { fsl,spi-num-chipselects = <1>; cs-gpios = <&gpio3 19 0>; @@ -245,6 +263,20 @@ >; }; + pinctrl_can1: can1grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 + >; + }; + + pinctrl_can_xcvr: can-xcvrgrp { + fsl,pins = < + /* Flexcan XCVR enable */ + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + >; + }; + pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 |