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authorPankaj Dubey <pankaj.dubey@samsung.com>2016-03-31 11:48:01 +0900
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-04-01 09:20:53 +0900
commitecaba514f4cb74fb076ac99be4719fb8cd9d584a (patch)
tree3252d0c74f867f5fe55e3e79981dafaa0e4ad4ab /arch/arm/boot/dts/exynos3250.dtsi
parentd278c808f52a5fdbdd93deb3636ea9558e56ffb7 (diff)
ARM: dts: exynos: Add UART2 DT node for Exynos3250 SoC
This patch add the UART2 Device Tree node for Exynos3250 SoC. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos3250.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 137f9015d4e8..030ce800f748 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -43,6 +43,7 @@
i2c7 = &i2c_7;
serial0 = &serial_0;
serial1 = &serial_1;
+ serial2 = &serial_2;
};
cpus {
@@ -452,6 +453,17 @@
status = "disabled";
};
+ serial_2: serial@13820000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13820000 0x100>;
+ interrupts = <0 111 0>;
+ clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
+ clock-names = "uart", "clk_uart_baud0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_data>;
+ status = "disabled";
+ };
+
i2c_0: i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;