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AgeCommit message (Expand)Author
2015-01-26Call reset handlers upon BL3-1 entry.Yatharth Kochar
2015-01-26Demonstrate model for routing IRQs to EL3Soby Mathew
2015-01-26Verify capabilities before handling PSCI callsSoby Mathew
2015-01-26Implement PSCI_FEATURES APISoby Mathew
2015-01-26Rework the PSCI migrate APIsSoby Mathew
2015-01-23Return success if an interrupt is seen during PSCI CPU_SUSPENDSoby Mathew
2015-01-23Validate power_state and entrypoint when executing PSCI callsSoby Mathew
2015-01-23Save 'power_state' early in PSCI CPU_SUSPEND callSoby Mathew
2015-01-23Rework internal API to save non-secure entry point infoSoby Mathew
2015-01-23PSCI: Check early for invalid CPU state during CPU ONSoby Mathew
2015-01-23Remove `ns_entrypoint` and `mpidr` from parameters in pm_opsSoby Mathew
2015-01-22Remove coherent memory from the BL memory mapsSoby Mathew
2015-01-22Move bakery algorithm implementation out of coherent memorySoby Mathew
2015-01-13Invalidate the dcache after initializing cpu-opsSoby Mathew
2014-12-12Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl()Soby Mathew
2014-12-04Fix the array size of mpidr_aff_map_nodes_t.Soby Mathew
2014-09-16Add opteed based on tspdJens Wiklander
2014-08-20Add CPU specific power management operationsSoby Mathew
2014-08-19Miscellaneous PSCI code cleanupsAchin Gupta
2014-08-19Add APIs to preserve highest affinity level in OFF stateAchin Gupta
2014-08-19Rework state management in the PSCI implementationAchin Gupta
2014-08-19Add PSCI service specific per-CPU dataAchin Gupta
2014-08-19Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIsJuan Castillo
2014-08-19Merge pull request #189 from achingupta/ag/tf-issues#153Dan Handley
2014-08-19Clarify platform porting interface to TSPDan Handley
2014-08-15Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta
2014-08-04Merge pull request #178 from soby-mathew/sm/optmize_el3_contextdanh-arm
2014-08-01Support asynchronous method for BL3-2 initializationVikram Kanigiri
2014-08-01Rework the TSPD setup codeVikram Kanigiri
2014-07-31Optimize EL3 register state stored in cpu_context structureSoby Mathew
2014-07-28Merge pull request #177 from jcastillo-arm/jc/tf-issues/096danh-arm
2014-07-28Rework incorrect use of assert() and panic() in codebaseJuan Castillo
2014-07-28Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta
2014-07-28Remove the concept of coherent stacksAchin Gupta
2014-07-19Remove coherent stack usage from the warm boot pathAchin Gupta
2014-07-19Make enablement of the MMU more flexibleAchin Gupta
2014-06-25Remove current CPU mpidr from PSCI common codeAndrew Thoelke
2014-06-24Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2danh-arm
2014-06-24Merge pull request #147 from athoelke/at/remove-bakery-mpidrdanh-arm
2014-06-24Remove all checkpatch errors from codebaseJuan Castillo
2014-06-23Remove calling CPU mpidr from bakery lock APIAndrew Thoelke
2014-06-23Merge pull request #145 from athoelke/at/psci-memory-optimization-v2danh-arm
2014-06-23Merge pull request #144 from athoelke/at/init-context-v2danh-arm
2014-06-23Correctly dimension the PSCI aff_map_node arrayAndrew Thoelke
2014-06-23Eliminate psci_suspend_context arrayAndrew Thoelke
2014-06-23Initialise CPU contexts from entry_point_infoAndrew Thoelke
2014-06-23Merge pull request #140 from athoelke/at/psci_smc_handlerdanh-arm
2014-06-17Remove early_exceptions from BL3-1Andrew Thoelke
2014-06-16Per-cpu data cache restructuringAndrew Thoelke
2014-06-11Provide cm_get/set_context() for current CPUAndrew Thoelke
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