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AgeCommit message (Expand)Author
2015-03-06Enable type-checking of arguments passed to printf() et al.Sandrine Bailleux
2015-02-12Export maximum affinity using PLATFORM_MAX_AFFLVL macroSoby Mathew
2015-01-28TBB: add authentication module interfaceJuan Castillo
2015-01-28stdlib: add missing features to build PolarSSLJuan Castillo
2015-01-28TBB: add a platform specific function to validate the ROTPKJuan Castillo
2015-01-28TBB: add support to include certificates in a FIP imageJuan Castillo
2015-01-26Call reset handlers upon BL3-1 entry.Yatharth Kochar
2015-01-26Demonstrate model for routing IRQs to EL3Soby Mathew
2015-01-26Increment the PSCI VERSION to 1.0Soby Mathew
2015-01-26Implement PSCI_FEATURES APISoby Mathew
2015-01-26Rework the PSCI migrate APIsSoby Mathew
2015-01-23Return success if an interrupt is seen during PSCI CPU_SUSPENDSoby Mathew
2015-01-23Validate power_state and entrypoint when executing PSCI callsSoby Mathew
2015-01-23Save 'power_state' early in PSCI CPU_SUSPEND callSoby Mathew
2015-01-23Remove `ns_entrypoint` and `mpidr` from parameters in pm_opsSoby Mathew
2015-01-22Move bakery algorithm implementation out of coherent memorySoby Mathew
2015-01-22Add macros for domain specific barriers.Soby Mathew
2015-01-16Merge pull request #235 from soby-mathew/sm/inv_cpu_opsdanh-arm
2015-01-13Invalidate the dcache after initializing cpu-opsSoby Mathew
2015-01-07Prevent optimisation of sysregs accessors callsSandrine Bailleux
2014-12-04Fix the array size of mpidr_aff_map_nodes_t.Soby Mathew
2014-11-04Merge pull request #219 from jcastillo-arm/jc/tf-issues/253danh-arm
2014-10-31Improvements to ARM GIC driverJuan Castillo
2014-10-29Apply errata workarounds only when major/minor revisions match.Soby Mathew
2014-10-28Merge pull request #215 from jcastillo-arm/jc/juno_mem_6danh-arm
2014-10-14Juno: Reserve some DDR-DRAM for secure useJuan Castillo
2014-10-10Merge pull request #206 from soby-mathew/sm/reset_cntvoffAndrew Thoelke
2014-09-25Create BL stage specific translation tablesSoby Mathew
2014-09-16Initialize SCTLR_EL1 based on MODE_RW bitJens Wiklander
2014-09-02Reset CNTVOFF_EL2 register before exit into EL1 on warm bootSoby Mathew
2014-08-27Miscellaneous documentation fixesSandrine Bailleux
2014-08-21Juno: Implement initial platform portSandrine Bailleux
2014-08-20Add support for selected Cortex-A57 errata workaroundsSoby Mathew
2014-08-20Add CPU specific crash reporting handlersSoby Mathew
2014-08-20Add CPU specific power management operationsSoby Mathew
2014-08-20Introduce framework for CPU specific operationsSoby Mathew
2014-08-19Rework use of labels in assembly macros.Soby Mathew
2014-08-19Miscellaneous PSCI code cleanupsAchin Gupta
2014-08-19Add APIs to preserve highest affinity level in OFF stateAchin Gupta
2014-08-19Add PSCI service specific per-CPU dataAchin Gupta
2014-08-19Add macro to flush per-CPU dataAchin Gupta
2014-08-19Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIsJuan Castillo
2014-08-19Clarify platform porting interface to TSPDan Handley
2014-08-14Move TSP private declarations into separate headerDan Handley
2014-08-14Simplify interface to TZC-400 driverDan Handley
2014-08-14Move IO storage source to drivers directoryDan Handley
2014-08-14Remove redundant io_init() functionDan Handley
2014-08-14Remove platform dependency in CCI-400 driverDan Handley
2014-08-12Add concept of console output log levelsDan Handley
2014-07-31Optimize EL3 register state stored in cpu_context structureSoby Mathew
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