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AgeCommit message (Expand)Author
2017-05-03Use SPDX license identifiersdp-arm
2017-04-19PSCI: Build option to enable D-Caches early in warmbootSoby Mathew
2017-03-31Add and use plat_crash_console_flush() APIAntonio Nino Diaz
2017-03-17Merge pull request #860 from jeenu-arm/hw-asstd-cohdavidcunado-arm
2017-03-08Simplify translation tables headers dependenciesAntonio Nino Diaz
2017-03-02Enable data caches early with hardware-assisted coherencyJeenu Viswambharan
2016-12-05Define and use no_ret macro where no return is expectedJeenu Viswambharan
2016-11-14Cosmetic change to exception tableDouglas Raillard
2016-10-12Add PMF instrumentation points in TFdp-arm
2016-07-19Introduce PSCI Library InterfaceSoby Mathew
2016-07-18Introduce `el3_runtime` and `PSCI` librariesSoby Mathew
2016-05-26Introduce some helper macros for exception vectorsSandrine Bailleux
2016-05-20Add 32 bit version of plat_get_syscnt_freqAntonio Nino Diaz
2016-04-14Dump platform-defined regs in crash reportingGerald Lejeune
2016-03-30Add ISR_EL1 to crash reportGerald Lejeune
2016-03-30Enable asynchronous abort exceptions during bootGerald Lejeune
2016-03-14Remove all non-configurable dead loopsAntonio Nino Diaz
2015-12-21Miscellaneous doc fixes for v1.2Sandrine Bailleux
2015-12-14Remove dashes from image names: 'BL3-x' --> 'BL3x'Juan Castillo
2015-12-09Move context management code to common locationYatharth Kochar
2015-12-09Fix issue in Floating point register restoreSoby Mathew
2015-12-01Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpudanh-arm
2015-11-26Introduce COLD_BOOT_SINGLE_CPU build optionSandrine Bailleux
2015-11-26Remove the IMF_READ_INTERRUPT_ID build optionSoby Mathew
2015-09-14Make generic code work in presence of system cachesAchin Gupta
2015-08-13PSCI: Migrate TF to the new platform API and CM helpersSoby Mathew
2015-06-24Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1danh-arm
2015-06-04Introduce PROGRAMMABLE_RESET_ADDRESS build optionSandrine Bailleux
2015-06-04Rationalize reset handling codeSandrine Bailleux
2015-05-13Fix handling of spurious interrupts in BL3_1Achin Gupta
2015-04-08Add support to indicate size and end of assembly functionsKévin Petit
2015-03-13Initialise cpu ops after enabling data cacheVikram Kanigiri
2015-01-26Call reset handlers upon BL3-1 entry.Yatharth Kochar
2015-01-22Remove coherent memory from the BL memory mapsSoby Mathew
2014-08-27Miscellaneous documentation fixesSandrine Bailleux
2014-08-20Add CPU specific crash reporting handlersSoby Mathew
2014-08-20Add CPU specific power management operationsSoby Mathew
2014-08-20Introduce framework for CPU specific operationsSoby Mathew
2014-08-15Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta
2014-08-04Merge pull request #179 from jcastillo-arm/jc/tf-issues/219danh-arm
2014-08-01Call platform_is_primary_cpu() only from reset handlerJuan Castillo
2014-07-31Optimize EL3 register state stored in cpu_context structureSoby Mathew
2014-07-28Merge pull request #172 from soby-mathew/sm/asm_assertdanh-arm
2014-07-28Add CPUECTLR_EL1 and Snoop Control register to crash reportingSoby Mathew
2014-07-28Rework the crash reporting in BL3-1 to use less stackSoby Mathew
2014-07-28Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta
2014-07-19Remove coherent stack usage from the warm boot pathAchin Gupta
2014-07-19Remove coherent stack usage from the cold boot pathAchin Gupta
2014-07-10Allow FP register context to be optional at build timeJuan Castillo
2014-06-27Merge pull request #151 from vikramkanigiri/vk/t133-code-readabilityAndrew Thoelke
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