diff options
author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2017-05-24 08:48:57 +0800 |
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committer | Dan Handley <dan.handley@arm.com> | 2017-05-24 17:34:41 +0100 |
commit | cfac68af163a4e95360bb681d35bba53081c6781 (patch) | |
tree | 6f1091675cb34f319522380b1e48eabb2ce8ede8 /include | |
parent | 32e9fc1a325952738af33b2b3e73fd0448636034 (diff) |
Cortex-A53: add some bit definitions
Add some bit definitions of CPUACTLR register in Cortex-A53
CPU library.
Change-Id: I142fd8ac4b06dd651a32e22951e71cdebbea123a
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Dan Handley <dan.handley@arm.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/lib/cpus/aarch64/cortex_a53.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/include/lib/cpus/aarch64/cortex_a53.h b/include/lib/cpus/aarch64/cortex_a53.h index 673f9787..10d9ee62 100644 --- a/include/lib/cpus/aarch64/cortex_a53.h +++ b/include/lib/cpus/aarch64/cortex_a53.h @@ -42,8 +42,14 @@ ******************************************************************************/ #define CPUACTLR_EL1 S3_1_C15_C2_0 /* Instruction def. */ -#define CPUACTLR_DTAH (1 << 24) -#define CPUACTLR_ENDCCASCI (1 << 44) +#define CPUACTLR_ENDCCASCI_SHIFT 44 +#define CPUACTLR_ENDCCASCI (1 << CPUACTLR_ENDCCASCI_SHIFT) +#define CPUACTLR_RADIS_SHIFT 27 +#define CPUACTLR_RADIS (3 << CPUACTLR_RADIS_SHIFT) +#define CPUACTLR_L1RADIS_SHIFT 25 +#define CPUACTLR_L1RADIS (3 << CPUACTLR_L1RADIS_SHIFT) +#define CPUACTLR_DTAH_SHIFT 24 +#define CPUACTLR_DTAH (1 << CPUACTLR_DTAH_SHIFT) /******************************************************************************* * L2 Auxiliary Control register specific definitions. |