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authorCaesar Wang <wxt@rock-chips.com>2016-10-11 09:36:00 +0800
committerCaesar Wang <wxt@rock-chips.com>2016-10-25 03:28:53 +0800
commitec6935692a1ecd69473ca0f1990d8ed280dfca61 (patch)
tree88b19daa7951a23ed6c47415b8488270b44ca621 /bl31
parenta5a423100822c4b8c9982024c333460f0d019d82 (diff)
rockchip: optimize the link mechanism for SRAM code
Add the common extra.ld.S and customized rk3399.ld.S to extend to more features for different platforms. For example, we can add SRAM section and specific address to load there if we need it, and the common bl31.ld.S not need to be modified. Therefore, we can remove the unused codes which copying explicitly from the function pmusram_prepare(). It looks like more clear. Change-Id: Ibffa2da5e8e3d1d2fca80085ebb296ceb967fce8 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Diffstat (limited to 'bl31')
-rw-r--r--bl31/bl31.ld.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/bl31/bl31.ld.S b/bl31/bl31.ld.S
index 743e65c4..9a05e6c3 100644
--- a/bl31/bl31.ld.S
+++ b/bl31/bl31.ld.S
@@ -39,6 +39,9 @@ MEMORY {
RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE
}
+#ifdef PLAT_EXTRA_LD_SCRIPT
+#include <plat.ld.S>
+#endif
SECTIONS
{