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authorJuan Castillo <juan.castillo@arm.com>2014-07-16 15:53:43 +0100
committerJuan Castillo <juan.castillo@arm.com>2014-08-01 09:39:50 +0100
commit53fdcebd6d330183ce3e46f38bb50e838a6a60de (patch)
treec645c183657171bec5d4c8491f6d8dd360d384d9 /bl2
parentdd2bdee61682df0ec65dfc43371c126a86a30c30 (diff)
Call platform_is_primary_cpu() only from reset handler
The purpose of platform_is_primary_cpu() is to determine after reset (BL1 or BL3-1 with reset handler) if the current CPU must follow the cold boot path (primary CPU), or wait in a safe state (secondary CPU) until the primary CPU has finished the system initialization. This patch removes redundant calls to platform_is_primary_cpu() in subsequent bootloader entrypoints since the reset handler already guarantees that code is executed exclusively on the primary CPU. Additionally, this patch removes the weak definition of platform_is_primary_cpu(), so the implementation of this function becomes mandatory. Removing the weak symbol avoids other bootloaders accidentally picking up an invalid definition in case the porting layer makes the real function available only to BL1. The define PRIMARY_CPU is no longer mandatory in the platform porting because platform_is_primary_cpu() hides the implementation details (for instance, there may be platforms that report the primary CPU in a system register). The primary CPU definition in FVP has been moved to fvp_def.h. The porting guide has been updated accordingly. Fixes ARM-software/tf-issues#219 Change-Id: If675a1de8e8d25122b7fef147cb238d939f90b5e
Diffstat (limited to 'bl2')
-rw-r--r--bl2/aarch64/bl2_entrypoint.S10
1 files changed, 0 insertions, 10 deletions
diff --git a/bl2/aarch64/bl2_entrypoint.S b/bl2/aarch64/bl2_entrypoint.S
index 6fcd0405..d3b0f558 100644
--- a/bl2/aarch64/bl2_entrypoint.S
+++ b/bl2/aarch64/bl2_entrypoint.S
@@ -48,16 +48,6 @@ func bl2_entrypoint
mov x21, x1
/* ---------------------------------------------
- * This is BL2 which is expected to be executed
- * only by the primary cpu (at least for now).
- * So, make sure no secondary has lost its way.
- * ---------------------------------------------
- */
- mrs x0, mpidr_el1
- bl platform_is_primary_cpu
- cbz x0, _panic
-
- /* ---------------------------------------------
* Set the exception vector to something sane.
* ---------------------------------------------
*/