diff options
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2016-11-30 15:21:11 +0000 |
|---|---|---|
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2016-12-05 14:55:35 +0000 |
| commit | a806dad58c4cf752238d7bbffbc9a1ce17f63cea (patch) | |
| tree | 9981b72bc40a9169972103ca315549d8a35bb052 /bl1 | |
| parent | c59428b1502f37c9b2f551613da1b491c4226d10 (diff) | |
Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is
transferred to functions from which return isn't expected. Such jumps
are made using 'bl' instruction to provide the callee with the location
from which it was jumped to. Additionally, debuggers infer the caller by
examining where 'lr' register points to. If a 'bl' of the nature
described above falls at the end of an assembly function, 'lr' will be
left pointing to a location outside of the function range. This misleads
the debugger back trace.
This patch defines a 'no_ret' macro to be used when jumping to functions
from which return isn't expected. The macro ensures to use 'bl'
instruction for the jump, and also, for debug builds, places a 'nop'
instruction immediately thereafter (unless instructed otherwise) so as
to leave 'lr' pointing within the function range.
Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'bl1')
| -rw-r--r-- | bl1/aarch64/bl1_exceptions.S | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index 869261de..7d97dd6b 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -49,25 +49,25 @@ vector_base bl1_exceptions vector_entry SynchronousExceptionSP0 mov x0, #SYNC_EXCEPTION_SP_EL0 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SynchronousExceptionSP0 vector_entry IrqSP0 mov x0, #IRQ_SP_EL0 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size IrqSP0 vector_entry FiqSP0 mov x0, #FIQ_SP_EL0 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size FiqSP0 vector_entry SErrorSP0 mov x0, #SERROR_SP_EL0 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SErrorSP0 /* ----------------------------------------------------- @@ -77,25 +77,25 @@ vector_entry SErrorSP0 vector_entry SynchronousExceptionSPx mov x0, #SYNC_EXCEPTION_SP_ELX bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SynchronousExceptionSPx vector_entry IrqSPx mov x0, #IRQ_SP_ELX bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size IrqSPx vector_entry FiqSPx mov x0, #FIQ_SP_ELX bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size FiqSPx vector_entry SErrorSPx mov x0, #SERROR_SP_ELX bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SErrorSPx /* ----------------------------------------------------- @@ -120,19 +120,19 @@ vector_entry SynchronousExceptionA64 vector_entry IrqA64 mov x0, #IRQ_AARCH64 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size IrqA64 vector_entry FiqA64 mov x0, #FIQ_AARCH64 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size FiqA64 vector_entry SErrorA64 mov x0, #SERROR_AARCH64 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SErrorA64 /* ----------------------------------------------------- @@ -142,25 +142,25 @@ vector_entry SErrorA64 vector_entry SynchronousExceptionA32 mov x0, #SYNC_EXCEPTION_AARCH32 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SynchronousExceptionA32 vector_entry IrqA32 mov x0, #IRQ_AARCH32 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size IrqA32 vector_entry FiqA32 mov x0, #FIQ_AARCH32 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size FiqA32 vector_entry SErrorA32 mov x0, #SERROR_AARCH32 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler check_vector_size SErrorA32 @@ -231,7 +231,7 @@ endfunc smc_handler64 unexpected_sync_exception: mov x0, #SYNC_EXCEPTION_AARCH64 bl plat_report_exception - bl plat_panic_handler + no_ret plat_panic_handler /* ----------------------------------------------------- * Save Secure/Normal world context and jump to |