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authorDouglas Raillard <douglas.raillard@arm.com>2017-02-15 17:38:43 +0000
committerDouglas Raillard <douglas.raillard@arm.com>2017-02-23 16:15:05 +0000
commit3fbe46d73fa2f0bf4eb6afbe70547c50ee7736ad (patch)
treee3ab807fbdb622fe39ce0a93b69ebb973df7c1ab
parent93f398205a8ebd2c1cef780251a0d24576ab1b28 (diff)
Clarify errata ERRATA_A53_836870 documentation
The errata is enabled by default on r0p4, which is confusing given that we state we do not enable errata by default. This patch clarifies this sentence by saying it is enabled in hardware by default. Change-Id: I70a062d93e1da2416d5f6d5776a77a659da737aa Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
-rw-r--r--docs/cpu-specific-build-macros.md2
-rw-r--r--lib/cpus/cpu-ops.mk2
2 files changed, 2 insertions, 2 deletions
diff --git a/docs/cpu-specific-build-macros.md b/docs/cpu-specific-build-macros.md
index a743487f..bd7d4ed3 100644
--- a/docs/cpu-specific-build-macros.md
+++ b/docs/cpu-specific-build-macros.md
@@ -58,7 +58,7 @@ For Cortex-A53, following errata build flags are defined :
* `ERRATA_A53_836870`: This applies errata 836870 workaround to Cortex-A53
CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
- r0p4 and onwards, this errata is enabled by default.
+ r0p4 and onwards, this errata is enabled by default in hardware.
For Cortex-A57, following errata build flags are defined :
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 0659bff9..4de30af2 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -63,7 +63,7 @@ ERRATA_A53_826319 ?=0
# Flag to apply erratum 836870 workaround during reset. This erratum applies
# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
-# erratum workaround is enabled by default.
+# erratum workaround is enabled by default in hardware.
ERRATA_A53_836870 ?=0
# Flag to apply erratum 806969 workaround during reset. This erratum applies