Add support for Cortex-A57 erratum 826977 workaround

Change-Id: Icaacd19c4cef9c10d02adcc2f84a4d7c97d4bcfa

4 files changed, 43 insertions, 0 deletions

diff --git a/docs/cpu-specific-build-macros.md b/docs/cpu-specific-build-macros.md
index 94d05d57..c41cbff6 100644
--- a/docs/cpu-specific-build-macros.md
+++ b/docs/cpu-specific-build-macros.md
@@ -63,6 +63,9 @@ For Cortex-A57, following errata build flags are defined :
 *   `ERRATA_A57_826974`: This applies errata 826974 workaround to Cortex-A57
      CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
 
+*   `ERRATA_A57_826977`: This applies errata 826977 workaround to Cortex-A57
+     CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
+
 *   `ERRATA_A57_828024`: This applies errata 828024 workaround to Cortex-A57
      CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
 
diff --git a/include/lib/cpus/aarch64/cortex_a57.h b/include/lib/cpus/aarch64/cortex_a57.h
index 95c1f56c..685b87b2 100644
--- a/include/lib/cpus/aarch64/cortex_a57.h
+++ b/include/lib/cpus/aarch64/cortex_a57.h
@@ -62,6 +62,7 @@
 #define CPUACTLR_EL1			S3_1_C15_C2_0	/* Instruction def. */
 
 #define CPUACTLR_DIS_LOAD_PASS_DMB	(1 << 59)
+#define CPUACTLR_GRE_NGRE_AS_NGNRE	(1 << 54)
 #define CPUACTLR_DIS_OVERREAD		(1 << 52)
 #define CPUACTLR_NO_ALLOC_WBWA		(1 << 49)
 #define CPUACTLR_DCC_AS_DCCI		(1 << 44)
diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S
index 25def1cd..63cb7579 100644
--- a/lib/cpus/aarch64/cortex_a57.S
+++ b/lib/cpus/aarch64/cortex_a57.S
@@ -194,6 +194,32 @@ apply_826974:
 endfunc errata_a57_826974_wa
 
 	/* ---------------------------------------------------
+	 * Errata Workaround for Cortex A57 Errata #826977.
+	 * This applies only to revision <= r1p1 of Cortex A57.
+	 * Inputs:
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Clobbers : x0 - x5
+	 * ---------------------------------------------------
+	 */
+func errata_a57_826977_wa
+	/*
+	 * Compare x0 against revision r1p1
+	 */
+	cmp	x0, #0x11
+	b.ls	apply_826977
+#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
+	b	print_revision_warning
+#else
+	ret
+#endif
+apply_826977:
+	mrs	x1, CPUACTLR_EL1
+	orr	x1, x1, #CPUACTLR_GRE_NGRE_AS_NGNRE
+	msr	CPUACTLR_EL1, x1
+	ret
+endfunc errata_a57_826977_wa
+
+	/* ---------------------------------------------------
 	 * Errata Workaround for Cortex A57 Errata #828024.
 	 * This applies only to revision <= r1p1 of Cortex A57.
 	 * Inputs:
@@ -289,6 +315,11 @@ func cortex_a57_reset_func
 	bl	errata_a57_826974_wa
 #endif
 
+#if ERRATA_A57_826977
+	mov	x0, x15
+	bl	errata_a57_826977_wa
+#endif
+
 #if ERRATA_A57_828024
 	mov	x0, x15
 	bl	errata_a57_828024_wa
diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 62de70f5..aa808b61 100644
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -78,6 +78,10 @@ ERRATA_A57_813420	?=0
 # only to revision <= r1p1 of the Cortex A57 cpu.
 ERRATA_A57_826974	?=0
 
+# Flag to apply erratum 826977 workaround during reset. This erratum applies
+# only to revision <= r1p1 of the Cortex A57 cpu.
+ERRATA_A57_826977	?=0
+
 # Flag to apply erratum 828024 workaround during reset. This erratum applies
 # only to revision <= r1p1 of the Cortex A57 cpu.
 ERRATA_A57_828024	?=0
@@ -106,6 +110,10 @@ $(eval $(call add_define,ERRATA_A57_813420))
 $(eval $(call assert_boolean,ERRATA_A57_826974))
 $(eval $(call add_define,ERRATA_A57_826974))
 
+# Process ERRATA_A57_826977 flag
+$(eval $(call assert_boolean,ERRATA_A57_826977))
+$(eval $(call add_define,ERRATA_A57_826977))
+
 # Process ERRATA_A57_828024 flag
 $(eval $(call assert_boolean,ERRATA_A57_828024))
 $(eval $(call add_define,ERRATA_A57_828024))