| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-11-30 | [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output | Francis Visoiu Mistrih |
| 2015-03-18 | [Hexagon] Intrinsics for circular and bit-reversed loads and stores | Krzysztof Parzyszek |
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index : ampere-computing/llvm.git | |
| LLVM including Ampere Computing toolchain specific patches |
| summaryrefslogtreecommitdiff |