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path: root/lib/Target/X86/X86.td
AgeCommit message (Expand)Author
2018-02-21Merging r325654:Hans Wennborg
2018-02-02Merging r323155:Hans Wennborg
2017-12-27[X86] Add CLWB to icelake.Craig Topper
2017-12-22[X86] Enable PRFCHW feature on KNL/KNM and all CPUs inherited from Broadwell.Craig Topper
2017-12-22[X86] Add prefetchwt1 instruction and overhaul priorities and isel enabling f...Craig Topper
2017-12-19[X86][SSE] Add cpu feature for aggressive combining to variable shufflesSimon Pilgrim
2017-12-10[X86] Adjust tablegen includes so we can use Instructions in scheduler models...Craig Topper
2017-11-26Control-Flow Enforcement Technology - Shadow Stack support (LLVM side)Oren Ben Simhon
2017-11-26[x86][icelake]GFNICoby Tayree
2017-11-25[X86] Don't report gather is legal on Skylake CPUs when AVX2/AVX512 is disabl...Craig Topper
2017-11-21[X86] Add BITALG, VAES, VBMI2, VNNI, VPCLMULQDQ, and VPOPCNTDQ instructions t...Craig Topper
2017-11-21[x86][icelake]BITALGCoby Tayree
2017-11-21[x86][icelake]VNNICoby Tayree
2017-11-21[x86][icelake]vbmi2Coby Tayree
2017-11-21[x86][icelake]vpclmulqdq introductionCoby Tayree
2017-11-21[x86][icelake]VAES introductionCoby Tayree
2017-11-19[X86] Switch cannonlake to use the SkylakeServer scheduling model instead of ...Craig Topper
2017-11-19[X86] Add skeleton support for icelake CPU.Craig Topper
2017-11-06[X86] Make FeatureAVX512 imply FeatureF16C.Craig Topper
2017-11-06[X86] Make FeatureAVX512 imply FeatureFMA.Craig Topper
2017-11-01[X86] Use foreach in X86.td to combine some of the CPU names that are obvious...Craig Topper
2017-11-01[X86] Add CMOV feature to 'i686' processor, making it a proper alias of penti...Craig Topper
2017-10-25[X86] Add avx512vpopcntdq to Knights MillCraig Topper
2017-10-24[X86][Broadwell] Added the instruction scheduling information for the Broadwe...Gadi Haber
2017-10-15[X86] Remove the SlowBTMem feature flag entirelyCraig Topper
2017-10-15[X86] Add FeatureSlowBTMem to Haswell, Broadwell, Skylake, Cannonlake, and Kn...Craig Topper
2017-10-13[X86] Add initial skeleton support for knm cpuCraig Topper
2017-10-13[X86] Fix some inconsistent formatting in the processor feature lists.Craig Topper
2017-10-13[X86] Add ProcIntelBDW to BroadwellProc class not BDWFeatures class.Craig Topper
2017-10-08[X86][SKX] Adding the scheduling information for the SKX target.Gadi Haber
2017-09-25Adding missing feature to goldmont.Michael Zuckerman
2017-09-19[X86][Skylake] Adding the scheduling information for the SkylakeClient targetGadi Haber
2017-09-13[X86] Adding X86 Processor FamiliesMohammed Agabaria
2017-08-30[X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as wellCraig Topper
2017-08-30[X86] Provide a separate feature bit for macro fusion support instead of basi...Craig Topper
2017-08-29Mark Knights Landing as having slow two memory operand instructionsCraig Topper
2017-08-25[x86] Back out one aspect of r311318: don't generically setChandler Carruth
2017-08-21[x86] Teach the "generic" x86 CPU to avoid patterns that are slow onChandler Carruth
2017-07-19AMD znver1 Initial Scheduler modelCraig Topper
2017-07-04[X86] Add RDRAND feature to GLM CPUCraig Topper
2017-06-29[LLVM][X86][Goldmont] Adding new target-cpu: GoldmontMichael Zuckerman
2017-05-25[X86] Adding vpopcntd and vpopcntq instructionsOren Ben Simhon
2017-05-18[X86] Replace slow LEA instructions in X86Lama Saba
2017-05-16Revert "[X86] Replace slow LEA instructions in X86"Reid Kleckner
2017-05-16[X86] Replace slow LEA instructions in X86Lama Saba
2017-05-03[X86][LWP] Add llvm support for LWP instructions (reapplied).Simon Pilgrim
2017-05-03Revert rL302028 due to accidental line ending changes.Simon Pilgrim
2017-05-03[X86][LWP] Add llvm support for LWP instructions.Simon Pilgrim
2017-04-21typoClement Courbet
2017-04-21Rename FastString flag.Clement Courbet