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path: root/lib/Target/SystemZ/SystemZInstrInfo.td
AgeCommit message (Expand)Author
2017-12-06[SystemZ] Add IntrWriteMem flag to int_s390_tabort intrinsicJonas Paulsson
2017-12-05[SystemZ] set 'guessInstructionProperties = 0' and set flags as needed.Jonas Paulsson
2017-09-28[SystemZ] Custom-expand ATOMIC_CMP_AND_SWAP_WITH_SUCCESSUlrich Weigand
2017-08-04[SystemZ] Add support for 128-bit atomic load/store/cmpxchgUlrich Weigand
2017-07-17[SystemZ] Add support for IBM z14 processor (3/3)Ulrich Weigand
2017-07-17[SystemZ] Add support for IBM z14 processor (1/3)Ulrich Weigand
2017-07-05[SystemZ] Simplify handling of 128-bit multiply/divide instructionUlrich Weigand
2017-06-30[SystemZ] Add all remaining instructionsUlrich Weigand
2017-06-30[SystemZ] Add missing high-word facility instructionsUlrich Weigand
2017-06-23[SystemZ] Remove unnecessary serialization before volatile loadsUlrich Weigand
2017-06-23[SystemZ] Fix trap issue and enable expensive checks.Jonas Paulsson
2017-05-10[SystemZ] Add miscellaneous instructionsUlrich Weigand
2017-05-10[SystemZ] Add missing arithmetic instructionsUlrich Weigand
2017-05-10[SystemZ] Add decimal integer instructionsUlrich Weigand
2017-05-10[SystemZ] Add crypto instructionsUlrich Weigand
2017-05-10[SystemZ] Add translate/convert instructionsUlrich Weigand
2017-05-10[SystemZ] Add missing memory/string instructionsUlrich Weigand
2017-05-09Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov
2016-12-02[SystemZ] Support remaining atomic instructionsUlrich Weigand
2016-12-02[SystemZ] Support floating-point control register instructionsUlrich Weigand
2016-12-02[SystemZ] Refactor hasSideEffects settingUlrich Weigand
2016-11-28[SystemZ] Support execution hint instructionsUlrich Weigand
2016-11-28[SystemZ] Support load-and-trap instructionsUlrich Weigand
2016-11-28[SystemZ] Add remaining branch instructionsUlrich Weigand
2016-11-28[SystemZ] Improve use of conditional instructionsUlrich Weigand
2016-11-11[SystemZ] Support CL(G)T instructionsUlrich Weigand
2016-11-11[SystemZ] Support load-and-zero-rightmost-byte facilityUlrich Weigand
2016-11-11[SystemZ] Use LLGT(R) instructionsUlrich Weigand
2016-11-08[SystemZ] Add program mask and addressing mode instructionsUlrich Weigand
2016-11-08[SystemZ] Model access registers as LLVM registersUlrich Weigand
2016-11-08[SystemZ] Always use semantic instruction classesUlrich Weigand
2016-11-08[SystemZ] Refactor InstRR* instruction format patternsUlrich Weigand
2016-11-08[SystemZ] Rename some Inst* instruction format classesUlrich Weigand
2016-11-08[SystemZ] Refactor branch and conditional instruction patternsUlrich Weigand
2016-10-31[SystemZ] Fix encoding of MVCK and .insn ssUlrich Weigand
2016-10-20[SystemZ] Post-RA scheduler implementationJonas Paulsson
2016-08-23Fix SystemZ hang caused by r279105Elliot Colp
2016-08-18Fix SystemZ compilation abort caused by negative AND maskElliot Colp
2016-08-08[SystemZ] Add support for the .insn directiveZhan Jun Liau
2016-08-05[SystemZ] Add missing classes and instructionsZhan Jun Liau
2016-07-11[SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunitiesZhan Jun Liau
2016-07-08[SystemZ] Add support for missing instructionsZhan Jun Liau
2016-06-28[SystemZ] Use NILL instruction instead of NILF where possibleZhan Jun Liau
2016-06-27[SystemZ] Avoid generating 2 XOR instructions for (and (xor x, -1), y)Zhan Jun Liau
2016-06-10[SystemZ] Support Compare and TrapsZhan Jun Liau
2016-05-16[SystemZ] Support LRVH and STRVH opcodesBryan Chan
2016-05-10[SystemZ] Add support for additional branch extended mnemonicsKit Barton
2016-04-11[SystemZ] Add SVC instructionUlrich Weigand
2016-04-11[SystemZ] Support conditional indirect sibling calls via BCRUlrich Weigand
2016-04-11[SystemZ] Remove incorrect CC use for C*BReturn instructionsUlrich Weigand
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