Age | Commit message (Expand) | Author |
---|---|---|
2017-10-19 | [RISCV] Initial codegen support for ALU operations | Alex Bradbury |
2017-10-12 | Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine" | Matthias Braun |
2017-10-12 | TargetMachine: Merge TargetMachine and LLVMTargetMachine | Matthias Braun |
2017-08-03 | Delete Default and JITDefault code models | Rafael Espindola |
2016-11-01 | [RISCV] Add bare-bones RISC-V MCTargetDesc | Alex Bradbury |
2016-11-01 | [RISCV] Add stub backend | Alex Bradbury |