| Age | Commit message (Expand) | Author |
|---|
| 2017-11-06 | Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles... | Graham Yiu |
| 2017-11-01 | Adds code to PPC ISEL lowering to recognize half-word inserts from vector_shu... | Graham Yiu |
| 2017-08-02 | [Power9] Exploit vector absolute difference instructions on Power 9 | Stefan Pintilie |
| 2017-05-17 | CodeGen: Power: Add lowering for shifts of v1i128. | Kyle Butt |
| 2017-05-12 | [PPC] Move the combine "a << (b % (sizeof(a) * 8)) -> (PPCshl a, b)" to the b... | Tim Shen |
| 2017-02-07 | [PowerPC][Altivec] Add vnot extended mnemonic | Nemanja Ivanovic |
| 2017-01-31 | [PowerPC][Altivec] Add vmr extended mnemonic | Nemanja Ivanovic |
| 2017-01-26 | [PPC] cleanup of mayLoad/mayStore flags and memory operands. | Sean Fertile |
| 2016-12-09 | [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What Yo... | Eugene Zelenko |
| 2016-11-18 | [PPC] limit line width to 80 characters | Ehsan Amiri |
| 2016-11-18 | [Power9] Add patterns for vnegd, vnegw | Ehsan Amiri |
| 2016-11-11 | [PowerPC] Add remaining vector permute builtins in altivec.h - LLVM portion | Nemanja Ivanovic |
| 2016-11-11 | Add a blank line for a test commit. | Sean Fertile |
| 2016-11-01 | [PowerPC] Implement vector shift builtins - llvm portion | Nemanja Ivanovic |
| 2016-10-31 | [PPC] add absolute difference altivec instructions and matching intrinsics | Nemanja Ivanovic |
| 2016-10-28 | Implement vector count leading/trailing bytes with zero lsb and vector parity | Nemanja Ivanovic |
| 2016-10-04 | [Power9] Part-word VSX integer scalar loads/stores and sign extend instructions | Nemanja Ivanovic |
| 2016-09-27 | [Power9] Builtins for ELF v.2 API conformance - back end portion | Nemanja Ivanovic |
| 2016-03-28 | [Power9] Implement new altivec instructions: bcd* series | Chuang-Yu Cheng |
| 2016-03-26 | [Power9] Implement new altivec instructions: permute, count zero, extend sign... | Chuang-Yu Cheng |
| 2016-03-01 | [Power9] Implement new vector compare, extract, insert instructions | Kit Barton |
| 2016-02-05 | Fix for PR 26193 | Nemanja Ivanovic |
| 2015-06-25 | [PPC] Implement vmrgew and vmrgow instructions | Kit Barton |
| 2015-06-11 | LLVM support for vector quad bit permute and gather instructions through buil... | Nemanja Ivanovic |
| 2015-05-25 | This patch adds support for the vector quadword add/sub instructions introduced | Kit Barton |
| 2015-05-16 | [PPC64] Add vector pack/unpack support from ISA 2.07 | Bill Schmidt |
| 2015-05-05 | This patch adds ABI support for v1i128 data type. | Kit Barton |
| 2015-04-28 | Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" | Sergey Dmitrouk |
| 2015-04-28 | Revert "[DebugInfo] Add debug locations to constant SD nodes" | Daniel Jasper |
| 2015-04-28 | [DebugInfo] Add debug locations to constant SD nodes | Sergey Dmitrouk |
| 2015-04-27 | [PPC64LE] Remove unnecessary swaps from lane-insensitive vector computations | Bill Schmidt |
| 2015-03-18 | [PowerPC] Correct typo in PPCInstrAltivec.td | Bill Schmidt |
| 2015-03-11 | [PowerPC] Remove canFoldAsLoad from instruction definitions | Hal Finkel |
| 2015-03-10 | Change the generation of the vmuluwm instruction to be based on the MUL opcode. | Kit Barton |
| 2015-03-05 | While reviewing the changes to Clang to add builtin support for the vsld, vsr... | Kit Barton |
| 2015-03-04 | Add LLVM support for PPC cryptography builtins | Nemanja Ivanovic |
| 2015-03-03 | Add the following 64-bit vector integer arithmetic instructions added in POWER8: | Kit Barton |
| 2015-02-20 | I incorrectly marked the VORC instruction as isCommutable when I added it. | Kit Barton |
| 2015-02-18 | This patch adds the VSX logical instructions introduced in the Power ISA 2.07... | Kit Barton |
| 2015-02-09 | This change implements the following three logical vector operations: | Kit Barton |
| 2015-02-05 | [PowerPC] Implement the vclz instructions for PWR8 | Bill Schmidt |
| 2015-02-03 | [PowerPC] Implement the vpopcnt instructions for POWER8 | Bill Schmidt |
| 2014-08-05 | [PowerPC] Swap arguments and adjust shift count for vsldoi on little endian | Bill Schmidt |
| 2014-08-04 | [PowerPC] Swap arguments to vpkuhum/vpkuwum on little-endian | Ulrich Weigand |
| 2014-08-02 | Don't use additional arguments for dss and friends to satisfy DSS_Form, | Joerg Sonnenberger |
| 2014-07-25 | [PATCH][PPC64LE] Correct little-endian usage of vmrgh* and vmrgl*. | Bill Schmidt |
| 2014-06-10 | [PPC64LE] Recognize shufflevector patterns for little endian | Bill Schmidt |
| 2014-05-22 | Reset the subtarget for DAGToDAG on every iteration of runOnMachineFunction. | Eric Christopher |
| 2014-03-24 | [PowerPC] Mark many instructions as commutative | Hal Finkel |
| 2013-11-27 | Add IIC_ prefix to PPC instruction-class names | Hal Finkel |
