| Age | Commit message (Expand) | Author |
|---|
| 2018-07-13 | [TableGen] Support multi-alternative pattern fragments | Ulrich Weigand |
| 2018-05-09 | [NVPTX] Added a feature to use short pointers for const/local/shared AS. | Artem Belevich |
| 2018-04-18 | [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instru... | Artem Belevich |
| 2018-03-21 | [NVPTX] Make tensor shape part of WMMA intrinsic's name. | Artem Belevich |
| 2018-03-20 | [NVPTX] Make tensor load/store intrinsics overloaded. | Artem Belevich |
| 2018-03-15 | [NVPTX] TblGen-ized lowering of WMMA intrinsics. | Artem Belevich |
| 2018-03-01 | [NVPTX] use pattern matching to lower int_nvvm_match_all_sync*. | Artem Belevich |
| 2018-02-28 | [NVPTX] Removed always-true predicates in NVPTX. | Artem Belevich |
| 2017-12-06 | [NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in... | Artem Belevich |
| 2017-11-07 | [NVPTX] Implement __nvvm_atom_add_gen_d builtin. | Justin Lebar |
| 2017-10-12 | [NVPTX] Implemented wmma intrinsics and instructions. | Artem Belevich |
| 2017-09-26 | [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins. | Artem Belevich |
| 2017-09-25 | Revert "[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtin... | Justin Lebar |
| 2017-09-25 | [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins. | Artem Belevich |
| 2017-09-21 | [NVPTX] Implemented bar.warp.sync, barrier.sync, and vote{.sync} instructions... | Artem Belevich |
| 2017-09-20 | [NVPTX] Implemented shfl.sync instruction and supporting intrinsics/builtins. | Artem Belevich |
| 2017-03-02 | [NVPTX] Added missing LDU/LDG intrinsics for f16. | Artem Belevich |
| 2017-02-23 | [NVPTX] Added support for .f16x2 instructions. | Artem Belevich |
| 2017-01-28 | [NVPTX] Add intrinsics to support named barriers. | Arpith Chacko Jacob |
| 2017-01-21 | [NVPTX] Auto-upgrade some NVPTX intrinsics to LLVM target-generic code. | Justin Lebar |
| 2017-01-18 | [NVPTX] Standardize asm printer on "foo \tbar". | Justin Lebar |
| 2017-01-18 | [NVPTX] Clean up nested !strconcat calls. | Justin Lebar |
| 2017-01-13 | [NVPTX] Added support for half-precision floating point. | Artem Belevich |
| 2016-09-28 | [NVPTX] Added intrinsics for atom.gen.{sys|cta}.* instructions. | Artem Belevich |
| 2016-07-07 | NVPTX: Remove the legacy ptx intrinsics | Justin Bogner |
| 2016-07-06 | NVPTX: Replace uses of cuda.syncthreads with nvvm.barrier0 | Justin Bogner |
| 2016-07-06 | NVPTX: Make the llvm.nvvm.shfl intrinsics and builtin names consistent | Justin Bogner |
| 2016-06-09 | [NVPTX] Add intrinsics for shfl instructions. | Justin Lebar |
| 2016-04-01 | [NVPTX] Annotate some instructions as hasSideEffects = 0. | Justin Lebar |
| 2016-03-01 | [NVPTX] Annotate param loads/stores as mayLoad/mayStore. | Justin Lebar |
| 2016-02-17 | [NVPTX] Annotate convergent intrinsics as convergent. | Justin Lebar |
| 2014-07-18 | NVPTX: support direct f16 <-> f64 conversions via intrinsics. | Tim Northover |
| 2014-07-17 | [NVPTX] Flag surface/texture query instructions with IsTexSurfQuery | Justin Holewinski |
| 2014-07-17 | [NVPTX] Add more surface/texture intrinsics, including CUDA unified texture f... | Justin Holewinski |
| 2014-07-17 | CodeGen: extend f16 conversions to permit types > float. | Tim Northover |
| 2014-06-27 | [NVPTX] Fix handling of ldg/ldu intrinsics. | Justin Holewinski |
| 2014-06-27 | [NVPTX] Add support for efficient rotate instructions on SM 3.2+ | Justin Holewinski |
| 2014-06-27 | [NVPTX] Add missing isel patterns for 64-bit atomics | Justin Holewinski |
| 2014-06-27 | [NVPTX] Add support for isspacep instruction | Justin Holewinski |
| 2014-06-27 | [NVPTX] Add support for envreg reads | Justin Holewinski |
| 2014-04-09 | [NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces | Justin Holewinski |
| 2013-07-01 | [NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu. | Justin Holewinski |
| 2013-06-28 | [NVPTX] Clean up comparison/select/convert patterns and factor out PTX instru... | Justin Holewinski |
| 2013-06-28 | [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rath... | Justin Holewinski |
| 2013-05-21 | [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic | Justin Holewinski |
| 2013-05-20 | [NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs | Justin Holewinski |
| 2013-02-12 | [NVPTX] Disable vector registers | Justin Holewinski |
| 2012-05-04 | This patch adds a new NVPTX back-end to LLVM which supports code generation f... | Justin Holewinski |
