Age | Commit message (Expand) | Author |
2017-07-26 | TargetLowering: Change isShuffleMaskLegal's mask argument type to ArrayRef<in... | Zvi Rackover |
2017-07-21 | [SystemZ, LoopStrengthReduce] | Jonas Paulsson |
2017-07-18 | AMDGPU: Figure out private memory regs after lowering | Matt Arsenault |
2017-07-15 | AMDGPU: Return correct type during argument lowering | Matt Arsenault |
2017-07-13 | [AMDGPU] fcaninicalize optimization for GFX9+ | Stanislav Mekhanoshin |
2017-07-12 | [AMDGPU] fcanonicalize elimination optimization | Stanislav Mekhanoshin |
2017-07-10 | Add DAG argument to canMergeStoresTo NFC. | Nirav Dave |
2017-07-08 | [AMDGPU] Fix -Wimplicit-fallthrough warning. NFCI. | Simon Pilgrim |
2017-07-06 | [AMDGPU] Always use rcp + mul with fast math | Stanislav Mekhanoshin |
2017-07-06 | [Constants] If we already have a ConstantInt*, prefer to use isZero/isOne/isM... | Craig Topper |
2017-06-27 | [AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc | Stanislav Mekhanoshin |
2017-06-27 | [AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0 | Stanislav Mekhanoshin |
2017-06-26 | AMDGPU: Whitespace fixes | Matt Arsenault |
2017-06-26 | AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling | Matt Arsenault |
2017-06-22 | [AMDGPU] Add intrinsics for tbuffer load and store - build error fix | David Stuttard |
2017-06-22 | [AMDGPU] Add intrinsics for tbuffer load and store | David Stuttard |
2017-06-21 | [AMDGPU] Add FP_CLASS to the add/setcc combine | Stanislav Mekhanoshin |
2017-06-21 | [AMDGPU] Combine add and adde, sub and sube | Stanislav Mekhanoshin |
2017-06-21 | [AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc | Stanislav Mekhanoshin |
2017-06-19 | AMDGPU: Cleanup CreateLiveInRegister | Matt Arsenault |
2017-06-12 | AMDGPU: Teach isLegalAddressingMode about flat offsets | Matt Arsenault |
2017-06-06 | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth |
2017-06-06 | [llvm] Remove double semicolons | Mandeep Singh Grang |
2017-06-02 | AMDGPUAnnotateUniformValue should always treat volatile loads as divergent | Alexander Timofeev |
2017-05-24 | [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI. | Nirav Dave |
2017-05-23 | [AMDGPU] Combine and (srl) into shl (bfe) | Stanislav Mekhanoshin |
2017-05-17 | AMDGPU: Start defining a calling convention | Matt Arsenault |
2017-05-17 | AMDGPU: Make better use of op_sel with high components | Matt Arsenault |
2017-05-17 | AMDGPU: Fix min3/max3 combines for f16/i16 | Matt Arsenault |
2017-05-11 | [AMDGPU] Placate unused variable warning in release builds. | Davide Italiano |
2017-05-11 | AMDGPU: Pull fneg out of extract_vector_elt | Matt Arsenault |
2017-05-04 | AMDGPU: GFX9 GS and HS shaders always have the scratch wave offset in SGPR5 | Marek Olsak |
2017-05-01 | Generalize the specialized flag-carrying SDNodes by moving flags into SDNode. | Amara Emerson |
2017-04-28 | AMDGPU: Add new amdgcn.init.exec intrinsics | Marek Olsak |
2017-04-28 | [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem... | Craig Topper |
2017-04-24 | Move size and alignment information of regclass to TargetRegisterInfo | Krzysztof Parzyszek |
2017-04-24 | AMDGPU: Move trap lowering to DAG | Matt Arsenault |
2017-04-21 | AMDGPU: Do not lower fast unsafe div for safe, f32, with fp32 denormals | Konstantin Zhuravlyov |
2017-04-21 | [AArch64] Improve code generation for logical instructions taking | Akira Hatanaka |
2017-04-21 | Revert r300932 and r300930. | Akira Hatanaka |
2017-04-21 | [AArch64] Improve code generation for logical instructions taking | Akira Hatanaka |
2017-04-19 | AMDGPU: Custom lower illegal small select types | Matt Arsenault |
2017-04-12 | AMDGPU: Fix invalid copies when copying i1 to phys reg | Matt Arsenault |
2017-04-11 | AMDGPU: Refactor SIMachineFunctionInfo slightly | Matt Arsenault |
2017-04-11 | AMDGPU: Refactor argument lowering | Matt Arsenault |
2017-04-06 | AMDGPU/GFX9: Fix shared and private aperture queries | Konstantin Zhuravlyov |
2017-04-06 | AMDGPU: Replace fp16SrcZerosHighBits with a whitelist | Matt Arsenault |
2017-04-06 | AMDGPU: Stop using CCAssignToRegWithShadow | Matt Arsenault |
2017-04-06 | [AMDGPU] Eliminate barrier if workgroup size is not greater than wavefront size | Stanislav Mekhanoshin |
2017-04-04 | AMDGPU: Remove legacy export intrinsic | Matt Arsenault |