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path: root/lib/Target/AMDGPU/SIISelLowering.cpp
AgeCommit message (Expand)Author
2018-04-09Merging r326535:Tom Stellard
2018-02-13Merging r324746:Hans Wennborg
2018-02-02Merging r323908:Hans Wennborg
2017-12-29AMDGPU: Use unique PSVs for buffer resourcesMatt Arsenault
2017-12-29AMDGPU: Implement getTgtMemIntrinsic for imagesMatt Arsenault
2017-12-15MachineFunction: Return reference from getFunction(); NFCMatthias Braun
2017-12-14TLI: Allow using PSV for intrinsic mem operandsMatt Arsenault
2017-12-14DAG: Expose all MMO flags in getTgtMemIntrinsicMatt Arsenault
2017-12-13AMDGPU: Partially fix disassembly of MIMG instructionsMatt Arsenault
2017-12-08AMDGPU: image_getlod and image_getresinfo do not read memoryMatt Arsenault
2017-12-08AMDGPU: Preserve MMO in adjustWritemaskMatt Arsenault
2017-12-04AMDGPU: Fix creating invalid copy when adjusting dmaskMatt Arsenault
2017-11-30AMDGPU: Use gfx9 carry-less add/sub instructionsMatt Arsenault
2017-11-29DAG: Add nuw when splitting loads and storesMatt Arsenault
2017-11-28[CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih
2017-11-22[AMDGPU] Fix SITargetLowering::LowerCall for pointer info of byval argumentYaxun Liu
2017-11-17Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie
2017-11-15AMDGPU: Replace i64 add/sub loweringMatt Arsenault
2017-11-15AMDGPU: Don't use MUBUF vaddr if address may overflowMatt Arsenault
2017-11-14AMDGPU: Handle or in multi-use shl ptr combineMatt Arsenault
2017-11-13AMDGPU: Preserve nuw in shl add ptr combineMatt Arsenault
2017-11-13AMDGPU: Fix multi-use shl/add combineMatt Arsenault
2017-11-09AMDGPU: Lower buffer store and atomic intrinsics manuallyMarek Olsak
2017-11-06AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32Matt Arsenault
2017-11-06[AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bitYaxun Liu
2017-10-24AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)Marek Olsak
2017-10-16Use the return value of UpdateNodeOperands(); in some cases, UpdateNodeOperan...Mark Searles
2017-10-13AMDGPU: Implement hasBitPreservingFPLogicMatt Arsenault
2017-10-12[AMDGPU] For amdpal, widen interpolation mode workaroundTim Renouf
2017-10-05AMDGPU: Set v2i32 any_extend to expandMatt Arsenault
2017-09-29AMDGPU: VALU carry-in and v_cndmask condition cannot be EXECNicolai Haehnle
2017-09-20AMDGPU: Start selecting v_mad_mixhi_f16Matt Arsenault
2017-09-14AMDGPU: Stop modifying SP in call sequencesMatt Arsenault
2017-09-14AMDGPU: Make frame register caller preservedMatt Arsenault
2017-09-07AMDGPU: Don't legalize i16 extloads to i32 with legal i16Matt Arsenault
2017-08-30AMDGPU: Select clamp pattern with v2f16Matt Arsenault
2017-08-11AMDGPU: Start adding tail call supportMatt Arsenault
2017-08-04[AMDGPU] Add support for Whole Wavefront ModeConnor Abbott
2017-08-04[AMDGPU] Add an llvm.amdgcn.wqm intrinsic for WQMConnor Abbott
2017-08-04AMDGPU: Remove pointless assertsMatt Arsenault
2017-08-03AMDGPU: Don't use report_fatal_error for unsupported call typesMatt Arsenault
2017-08-03AMDGPU: Remove error on calls for amdgcnMatt Arsenault
2017-08-03AMDGPU: Fix implicitarg.ptr handling special inputsMatt Arsenault
2017-08-03AMDGPU: Pass special input registers to functionsMatt Arsenault
2017-08-02AMDGPU: Analyze callee resource usage in AsmPrinterMatt Arsenault
2017-08-02AMDGPU: Don't place arguments in emergency stack slotMatt Arsenault
2017-08-01AMDGPU: Fix handling of div_scale with undef inputsMatt Arsenault
2017-08-01AMDGPU: Initial implementation of callsMatt Arsenault
2017-07-29AMDGPU: Teach isLegalAddressingMode about global_* instructionsMatt Arsenault
2017-07-28AMDGPU: Annotate implicitarg.ptr usageMatt Arsenault
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