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path: root/lib/Target/AArch64/AArch64Subtarget.cpp
AgeCommit message (Expand)Author
2018-06-15Added XGene modelMartin Elshuber
2018-01-31Merging r323810:Hans Wennborg
2017-12-18AArch64/X86: Factor out common bzero logic; NFCMatthias Braun
2017-12-13Remove redundant includes from lib/Target/AArch64.Michael Zolotukhin
2017-11-28[aarch64][globalisel] Define G_ATOMIC_CMPXCHG and G_ATOMICRMW_* and make them...Daniel Sanders
2017-09-25[AArch64] Add basic support for Qualcomm's Saphira CPU.Chad Rosier
2017-08-21[ARM][AArch64] Cortex-A75 and Cortex-A55 supportSam Parker
2017-08-15Reapply "[GlobalISel] Remove the GISelAccessor API."Quentin Colombet
2017-08-08Revert "[GlobalISel] Remove the GISelAccessor API."Quentin Colombet
2017-08-04[GlobalISel] Remove the GISelAccessor API.Quentin Colombet
2017-08-03[GlobalISel] Make GlobalISel a non-optional library.Quentin Colombet
2017-07-29[AArch64] Use 8 bytes as preferred function alignment on Cortex-A53.Florian Hahn
2017-07-18[COFF, ARM64] Reserve X18 register by defaultMandeep Singh Grang
2017-07-18[AArch64] Use 16 bytes as preferred function alignment on Cortex-A73.Florian Hahn
2017-07-07[AArch64] Use 16 bytes as preferred function alignment on Cortex-A57.Florian Hahn
2017-07-07[AArch64] Use 16 bytes as preferred function alignment on Cortex-A72.Florian Hahn
2017-06-12[Falkor] Enable SW Prefetch.Haicheng Wu
2017-05-24Revert r291254: [AArch64] Reduce vector insert/extract cost for FalkorMatthew Simpson
2017-05-19[globalisel][tablegen] Demote OptForSize/OptForMinSize/ForCodeSize to per-fun...Daniel Sanders
2017-05-15[SLP] Enable 64-bit wide vectorization on AArch64Adam Nemet
2017-05-01[AArch64] Move GISel accessor initialization from TargetMachine to Subtarget.Quentin Colombet
2017-04-29[globalisel][tablegen] Compute available feature bits correctly.Daniel Sanders
2017-04-17AArch64: put nonlazybind special handling behind a flag for now.Tim Northover
2017-04-17AArch64: support nonlazybindTim Northover
2017-04-04[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsiaPetr Hosek
2017-03-07[AArch64] Vulcan is now ThunderXT99Joel Jones
2017-02-17[AArch64] Add Cavium ThunderX supportJoel Jones
2017-01-06[AArch64] Reduce vector insert/extract cost for Falkor.Chad Rosier
2016-11-22[AArch64] Set the max interleave factor for Falkor.Chad Rosier
2016-11-15[AArch64] Add support for Qualcomm's Falkor CPU.Chad Rosier
2016-10-25[AArch64] Adjust the cost model for Exynos M1.Evandro Menezes
2016-10-21Set the vectorizer MaxInterleaveFactor for Exynos.Abderrazek Zaafrani
2016-10-14GlobalISel: rename legalizer components to match others.Tim Northover
2016-10-03AArch64Subtarget: Remove unused CPUString fieldMatthias Braun
2016-09-26Add support to optionally limit the size of jump tables.Evandro Menezes
2016-07-27[GlobalISel] Introduce an instruction selector.Ahmed Bougacha
2016-07-22GlobalISel: implement legalization pass, with just one transformation.Tim Northover
2016-07-06Minor code cleanup. NFC.Junmo Park
2016-07-01Target: Remove unused arguments from overrideSchedPolicy, NFCDuncan P. N. Exon Smith
2016-06-30Delete unused includes. NFC.Rafael Espindola
2016-06-30[AArch64] Add Broadcom Vulcan scheduling model.Pankaj Gode
2016-06-27Move shouldAssumeDSOLocal to Target.Rafael Espindola
2016-06-21[Kryo] Enable loop prefetcher.Haicheng Wu
2016-06-21[AArch64] Restore codegen for AArch64 Cortex-A72/A73 after NFCISilviu Baranga
2016-06-20[AARCH64] Add support for Broadcom VulcanPankaj Gode
2016-06-10[AArch64] Add preferred alignments for Exynos M1Evandro Menezes
2016-06-02AArch64: Do not test for CPUs, use SubtargetFeaturesMatthias Braun
2016-05-31Delete AArch64II::MO_CONSTPOOL.Rafael Espindola
2016-05-27AArch64Subtarget: Use default member initializersMatthias Braun
2016-05-26Use shouldAssumeDSOLocal on AArch64.Rafael Espindola
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