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path: root/lib/Target/AArch64/AArch64.td
AgeCommit message (Expand)Author
2018-06-15Added XGene modelMartin Elshuber
2017-12-18AArch64: work around how Cyclone handles "movi.2d vD, #0".Tim Northover
2017-12-14[AArch64] Test patchEvandro Menezes
2017-10-17AArch64: Enable AES instruction fusion on Cyclone.Matthias Braun
2017-09-25[AArch64] Add basic support for Qualcomm's Saphira CPU.Chad Rosier
2017-09-18[AArch64] Add V8_2aOps feature to Cortex-A55 and 75Sam Parker
2017-08-28[AArch64][Falkor] Avoid generating STRQro* instructionsGeoff Berry
2017-08-21[ARM][AArch64] Cortex-A75 and Cortex-A55 supportSam Parker
2017-08-10[AArch64] Assembler support for v8.3 RCpcSam Parker
2017-08-10[ARM][AArch64] ARMv8.3-A enablementSam Parker
2017-08-09[AArch64] Assembler support for the ARMv8.2a dot product instructionsSjoerd Meijer
2017-07-18[AArch64] Adjust the feature set for Exynos M2Evandro Menezes
2017-07-13[AArch64] Add an SVE target feature to the backend and TargetParser.Amara Emerson
2017-06-15[AArch64] Enable FeatureFuseAES for the generic processor model.Florian Hahn
2017-05-31[AArch64] Enable FeatureFuseAES on Cortex-A53.Florian Hahn
2017-05-31[AArch64] Enable FeatureFuseAES on Cortex-A73.Florian Hahn
2017-05-15[AArch64] Enable FeatureFuseAES on Cortex-A72.Florian Hahn
2017-05-03[AArch64] armv8-A doesn't have CRC.Ahmed Bougacha
2017-04-05[AArch64] Crypto requires FP.James Molloy
2017-03-31[AArch64] Add new subtarget feature to fold LSL into address mode.Balaram Makam
2017-03-28[AArch64] [Assembler] option to disable negative immediate conversionsSanne Wouda
2017-03-07[AArch64] Vulcan is now ThunderXT99Joel Jones
2017-02-17[AArch64] Add Cavium ThunderX supportJoel Jones
2017-02-01[AArch64] Add new target feature to fuse literal generationEvandro Menezes
2017-02-01[AArch64] Add new subtarget feature to fuse AES crypto operationsEvandro Menezes
2017-01-24[AArch64] Fix typo. NFC.Chad Rosier
2017-01-24[AArch64] Rename 'no-quad-ldst-pairs' to 'slow-paired-128'Evandro Menezes
2017-01-19Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders
2017-01-18Re-revert: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders
2017-01-18Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders
2017-01-16[AArch64] Falkor supports Rounding Double Multiply Add/Subtract instructions.Chad Rosier
2017-01-16Revert r292132: [globalisel] Tablegen-erate current Register Bank Information...Daniel Sanders
2017-01-16[globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders
2017-01-04[AArch64] Update the feature set for Qualcomm's Falkor CPU.Chad Rosier
2016-12-16[AArch64] Add FeatureSlowMisaligned128Store to Exynos M1 and M2Evandro Menezes
2016-12-13Add support for Samsung Exynos M3 (NFC)Evandro Menezes
2016-11-30[AArch64] Refactor LSE support as feature separate from V8.1a support.Joel Jones
2016-11-29[AArch64] Add a basic SchedMachineModel for Falkor.Chad Rosier
2016-11-15[AArch64] Add support for Qualcomm's Falkor CPU.Chad Rosier
2016-11-11[AArch64] Enable merging of adjacent zero stores for all subtargets.Chad Rosier
2016-11-07[AArch64] Removed the narrow load merging code in the ld/st optimizer.Chad Rosier
2016-10-26[AArch64] Create feature set for Samsung Exynos-M2Evandro Menezes
2016-10-24[AArch64] Optionally use the Newton series for reciprocal estimationEvandro Menezes
2016-10-04AArch64: Macrofusion: Split features, add missing combinations.Matthias Braun
2016-09-20Revert part of "AArch64: Do not test for CPUs, use SubtargetFeatures"Evandro Menezes
2016-08-24[AArch64] Adjust the feature set for Exynos M1.Evandro Menezes
2016-08-01[AArch64] Add support for Samsung Exynos M2 (NFC).Evandro Menezes
2016-07-19[AArch64] PredictableSelectIsExpensive for Vulcan.Pankaj Gode
2016-07-14[AArch64] Adjust the scheduling model for Exynos-M1.Evandro Menezes
2016-07-12[Kryo] Enable ZCZeroing featureHaicheng Wu
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