diff options
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 2 | ||||
-rw-r--r-- | lib/Target/AMDGPU/GCNRegPressure.cpp | 6 | ||||
-rw-r--r-- | lib/Target/ARM/ARMConstantIslandPass.cpp | 2 | ||||
-rw-r--r-- | lib/Target/ARM/ARMConstantPoolValue.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Hexagon/HexagonSplitDouble.cpp | 2 | ||||
-rw-r--r-- | lib/Target/MSP430/MSP430ISelDAGToDAG.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Mips/MipsConstantIslandPass.cpp | 2 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86FloatingPoint.cpp | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 2 |
11 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp b/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp index 18f342d325e..646303d51a4 100644 --- a/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp +++ b/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp @@ -261,7 +261,7 @@ unsigned PHILinearize::getNumSources(unsigned DestReg) { return phiInfoElementGetSources(findPHIInfoElement(DestReg)).size(); } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void PHILinearize::dump(MachineRegisterInfo *MRI) { const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo(); dbgs() << "=PHIInfo Start=\n"; diff --git a/lib/Target/AMDGPU/GCNIterativeScheduler.cpp b/lib/Target/AMDGPU/GCNIterativeScheduler.cpp index f1e0a157556..9e743850f9a 100644 --- a/lib/Target/AMDGPU/GCNIterativeScheduler.cpp +++ b/lib/Target/AMDGPU/GCNIterativeScheduler.cpp @@ -52,7 +52,7 @@ static inline MachineInstr *getMachineInstr(const SUnit &SU) { return SU.getInstr(); } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD static void printRegion(raw_ostream &OS, MachineBasicBlock::iterator Begin, diff --git a/lib/Target/AMDGPU/GCNRegPressure.cpp b/lib/Target/AMDGPU/GCNRegPressure.cpp index cc8511d3b7e..f8d0acb3df9 100644 --- a/lib/Target/AMDGPU/GCNRegPressure.cpp +++ b/lib/Target/AMDGPU/GCNRegPressure.cpp @@ -31,7 +31,7 @@ using namespace llvm; #define DEBUG_TYPE "machine-scheduler" -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void llvm::printLivesAt(SlotIndex SI, const LiveIntervals &LIS, @@ -175,7 +175,7 @@ bool GCNRegPressure::less(const SISubtarget &ST, (getVGPRNum() < O.getVGPRNum()); } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void GCNRegPressure::print(raw_ostream &OS, const SISubtarget *ST) const { OS << "VGPRs: " << getVGPRNum(); @@ -433,7 +433,7 @@ bool GCNDownwardRPTracker::advance(MachineBasicBlock::const_iterator Begin, return advance(End); } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD static void reportMismatch(const GCNRPTracker::LiveRegSet &LISLR, const GCNRPTracker::LiveRegSet &TrackedLR, diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 9d15cfdf143..68d00e28f9d 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -320,7 +320,7 @@ void ARMConstantIslands::verify() { #endif } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) /// print block size and offset information - debugging LLVM_DUMP_METHOD void ARMConstantIslands::dumpBBs() { DEBUG({ diff --git a/lib/Target/ARM/ARMConstantPoolValue.cpp b/lib/Target/ARM/ARMConstantPoolValue.cpp index 7b5441adfa7..38ea835fbe2 100644 --- a/lib/Target/ARM/ARMConstantPoolValue.cpp +++ b/lib/Target/ARM/ARMConstantPoolValue.cpp @@ -97,7 +97,7 @@ ARMConstantPoolValue::hasSameValue(ARMConstantPoolValue *ACPV) { return false; } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void ARMConstantPoolValue::dump() const { errs() << " " << *this; } diff --git a/lib/Target/Hexagon/HexagonSplitDouble.cpp b/lib/Target/Hexagon/HexagonSplitDouble.cpp index d56a77baf58..0d97df776e6 100644 --- a/lib/Target/Hexagon/HexagonSplitDouble.cpp +++ b/lib/Target/Hexagon/HexagonSplitDouble.cpp @@ -131,7 +131,7 @@ const TargetRegisterClass *const HexagonSplitDoubleRegs::DoubleRC = INITIALIZE_PASS(HexagonSplitDoubleRegs, "hexagon-split-double", "Hexagon Split Double Registers", false, false) -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void HexagonSplitDoubleRegs::dump_partition(raw_ostream &os, const USet &Part, const TargetRegisterInfo &TRI) { dbgs() << '{'; diff --git a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp index 45d493fe701..0b02f79f472 100644 --- a/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp +++ b/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp @@ -61,7 +61,7 @@ namespace { return GV != nullptr || CP != nullptr || ES != nullptr || JT != -1; } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void dump() { errs() << "MSP430ISelAddressMode " << this << '\n'; if (BaseType == RegBase && Base.Reg.getNode() != nullptr) { diff --git a/lib/Target/Mips/MipsConstantIslandPass.cpp b/lib/Target/Mips/MipsConstantIslandPass.cpp index 0f8c5fc1964..257e8f45a70 100644 --- a/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -425,7 +425,7 @@ bool MipsConstantIslands::isOffsetInRange U.getMaxDisp(), U.NegOk); } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) /// print block size and offset information - debugging LLVM_DUMP_METHOD void MipsConstantIslands::dumpBBs() { for (unsigned J = 0, E = BBInfo.size(); J !=E; ++J) { diff --git a/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp b/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp index 2da82e0627b..7d34efd4af3 100644 --- a/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp +++ b/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp @@ -953,7 +953,7 @@ bool PPCVSXSwapRemoval::removeSwaps() { return Changed; } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) // For debug purposes, dump the contents of the swap vector. LLVM_DUMP_METHOD void PPCVSXSwapRemoval::dumpSwapVector() { diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp index 6344ba02fa8..5582526541b 100644 --- a/lib/Target/X86/X86FloatingPoint.cpp +++ b/lib/Target/X86/X86FloatingPoint.cpp @@ -169,7 +169,7 @@ namespace { // Shuffle live registers to match the expectations of successor blocks. void finishBlockStack(); -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) void dumpStack() const { dbgs() << "Stack contents:"; for (unsigned i = 0; i != StackTop; ++i) { diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 707ce24295b..3aa3244a706 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -102,7 +102,7 @@ namespace { Base_Reg = Reg; } -#ifdef LLVM_ENABLE_DUMP +#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) void dump() { dbgs() << "X86ISelAddressMode " << this << '\n'; dbgs() << "Base_Reg "; |