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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-12-10 10:36:34 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-12-10 10:36:34 +0000
commit086791eca2260c03c7bbdd37a53626d16656f0ca (patch)
tree338587b3a572be6708a71a39c22332bea08ca0a4 /test/CodeGen/SystemZ/spill-01.ll
parentfaeef98cbcd1b8e1830b3ced48e85dd77c1b71b8 (diff)
Add TargetLowering::prepareVolatileOrAtomicLoad
One unusual feature of the z architecture is that the result of a previous load can be reused indefinitely for subsequent loads, even if a cache-coherent store to that location is performed by another CPU. A special serializing instruction must be used if you want to force a load to be reattempted. Since volatile loads are not supposed to be omitted in this way, we should insert a serializing instruction before each such load. The same goes for atomic loads. The patch implements this at the IR->DAG boundary, in a similar way to atomic fences. It is a no-op for targets other than SystemZ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196905 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/SystemZ/spill-01.ll')
-rw-r--r--test/CodeGen/SystemZ/spill-01.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/SystemZ/spill-01.ll b/test/CodeGen/SystemZ/spill-01.ll
index ca64a88f2a0..c1f780c55d3 100644
--- a/test/CodeGen/SystemZ/spill-01.ll
+++ b/test/CodeGen/SystemZ/spill-01.ll
@@ -400,6 +400,7 @@ define void @f10() {
; CHECK: stgrl [[REG]], h8
; CHECK: br %r14
entry:
+ %val8 = load volatile i64 *@h8
%val0 = load volatile i64 *@h0
%val1 = load volatile i64 *@h1
%val2 = load volatile i64 *@h2
@@ -408,7 +409,6 @@ entry:
%val5 = load volatile i64 *@h5
%val6 = load volatile i64 *@h6
%val7 = load volatile i64 *@h7
- %val8 = load volatile i64 *@h8
%val9 = load volatile i64 *@h9
call void @foo()