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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-12-15 20:13:57 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-12-15 20:13:57 +0000 |
commit | f1c8b170f5cc7b0a2f41af13a9a2326587e0118a (patch) | |
tree | 190a5ef762c2063d5fc4034b649ca997aa97610f /test/CodeGen/Hexagon | |
parent | 17486de5d052f30f15a3b61664c37b7637f68b54 (diff) |
[Hexagon] Fix operand-swapping PatFrag for atomic stores
PatFrag now has the atomicity information stored as bit fields. They
need to be copied to the new PatFrag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320855 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
-rw-r--r-- | test/CodeGen/Hexagon/intrinsics/atomic_store.ll | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/intrinsics/atomic_store.ll b/test/CodeGen/Hexagon/intrinsics/atomic_store.ll new file mode 100644 index 00000000000..23865994db2 --- /dev/null +++ b/test/CodeGen/Hexagon/intrinsics/atomic_store.ll @@ -0,0 +1,68 @@ +; RUN: sed -e "s/ORDER/unordered/" %s | llc -march=hexagon | FileCheck %s +; RUN: sed -e "s/ORDER/monotonic/" %s | llc -march=hexagon | FileCheck %s +; RUN: sed -e "s/ORDER/release/" %s | llc -march=hexagon | FileCheck %s +; RUN: sed -e "s/ORDER/seq_cst/" %s | llc -march=hexagon | FileCheck %s + +%struct.Obj = type { [100 x i32] } + +@i8Src = global i8 0, align 1 +@i8Dest = global i8 0, align 1 +@i16Src = global i16 0, align 2 +@i16Dest = global i16 0, align 2 +@i32Src = global i32 0, align 4 +@i32Dest = global i32 0, align 4 +@i64Src = global i64 0, align 8 +@i64Dest = global i64 0, align 8 +@ptrSrc = global %struct.Obj* null, align 4 +@ptrDest = global %struct.Obj* null, align 4 + +define void @store_i8() #0 { +entry: + %i8Tmp = load i8, i8* @i8Src, align 1 + store atomic i8 %i8Tmp, i8* @i8Dest ORDER, align 1 + ret void +} +; CHECK-LABEL: store_i8: +; CHECK: [[TMP_REG:r[0-9]+]] = memub(gp+#i8Src) +; CHECK: memb(gp+#i8Dest) = [[TMP_REG]] + +define void @store_i16() #0 { +entry: + %i16Tmp = load i16, i16* @i16Src, align 2 + store atomic i16 %i16Tmp, i16* @i16Dest ORDER, align 2 + ret void +} +; CHECK-LABEL: store_i16: +; CHECK: [[TMP_REG:r[0-9]+]] = memuh(gp+#i16Src) +; CHECK: memh(gp+#i16Dest) = [[TMP_REG]] + +define void @store_i32() #0 { +entry: + %i32Tmp = load i32, i32* @i32Src, align 4 + store atomic i32 %i32Tmp, i32* @i32Dest ORDER, align 4 + ret void +} +; CHECK-LABEL: store_i32: +; CHECK: [[TMP_REG:r[0-9]+]] = memw(gp+#i32Src) +; CHECK: memw(gp+#i32Dest) = [[TMP_REG]] + +define void @store_i64() #0 { +entry: + %i64Tmp = load i64, i64* @i64Src, align 8 + store atomic i64 %i64Tmp, i64* @i64Dest ORDER, align 8 + ret void +} +; CHECK-LABEL: store_i64: +; CHECK: [[TMP_REG:r[0-9]+:[0-9]+]] = memd(gp+#i64Src) +; CHECK: memd(gp+#i64Dest) = [[TMP_REG]] + +define void @store_ptr() #0 { +entry: + %ptrTmp = load i32, i32* bitcast (%struct.Obj** @ptrSrc to i32*), align 4 + store atomic i32 %ptrTmp, i32* bitcast (%struct.Obj** @ptrDest to i32*) ORDER, align 4 + ret void +} +; CHECK-LABEL: store_ptr: +; CHECK: [[TMP_REG:r[0-9]+]] = memw(gp+#ptrSrc) +; CHECK: memw(gp+#ptrDest) = [[TMP_REG]] + |