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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-11-22 20:43:00 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-11-22 20:43:00 +0000
commitd21081d28add530f787b1218a44bf8c97c5385a2 (patch)
tree2691a5aa1aea1e8053e0939e1ed311f479762775 /test/CodeGen/Hexagon
parentdef4c6a7916223462516da7071bae626efb2bbd4 (diff)
[Hexagon] Remove trailing spaces, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@318875 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
-rw-r--r--test/CodeGen/Hexagon/inline-asm-qv.ll2
-rw-r--r--test/CodeGen/Hexagon/intrinsics/xtype_fp.ll2
-rw-r--r--test/CodeGen/Hexagon/mulh.ll2
-rw-r--r--test/CodeGen/Hexagon/newvaluejump2.ll2
-rw-r--r--test/CodeGen/Hexagon/rdf-copy.ll2
-rw-r--r--test/CodeGen/Hexagon/split-const32-const64.ll2
6 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/Hexagon/inline-asm-qv.ll b/test/CodeGen/Hexagon/inline-asm-qv.ll
index d540c09c1dd..26f4ac0bd03 100644
--- a/test/CodeGen/Hexagon/inline-asm-qv.ll
+++ b/test/CodeGen/Hexagon/inline-asm-qv.ll
@@ -15,5 +15,5 @@ entry:
ret void
}
-attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
attributes #1 = { nounwind readnone }
diff --git a/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll b/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
index ee56e905162..7984fee5558 100644
--- a/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
+++ b/test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
@@ -342,7 +342,7 @@ declare float @llvm.hexagon.F2.sfimm.n(i32)
define float @F2_sfimm_n() {
%z = call float @llvm.hexagon.F2.sfimm.n(i32 0)
ret float %z
-}
+}
; CHECK: = sfmake(#0):neg
declare double @llvm.hexagon.F2.dfimm.p(i32)
diff --git a/test/CodeGen/Hexagon/mulh.ll b/test/CodeGen/Hexagon/mulh.ll
index 0442e28d408..013c69199cd 100644
--- a/test/CodeGen/Hexagon/mulh.ll
+++ b/test/CodeGen/Hexagon/mulh.ll
@@ -3,7 +3,7 @@
target triple = "hexagon"
; CHECK-LABEL: danny:
-; CHECK: r{{[0-9]+}} = mpy(r0,r1)
+; CHECK: r{{[0-9]+}} = mpy(r0,r1)
define i32 @danny(i32 %a0, i32 %a1) {
b2:
%v3 = sext i32 %a0 to i64
diff --git a/test/CodeGen/Hexagon/newvaluejump2.ll b/test/CodeGen/Hexagon/newvaluejump2.ll
index fbc3f2925d1..99c9d1a60af 100644
--- a/test/CodeGen/Hexagon/newvaluejump2.ll
+++ b/test/CodeGen/Hexagon/newvaluejump2.ll
@@ -1,6 +1,6 @@
; RUN: llc -march=hexagon -mcpu=hexagonv5 -disable-hexagon-misched < %s \
; RUN: | FileCheck %s
-; Check that we generate new value jump, both registers, with one
+; Check that we generate new value jump, both registers, with one
; of the registers as new.
@Reg = common global i32 0, align 4
diff --git a/test/CodeGen/Hexagon/rdf-copy.ll b/test/CodeGen/Hexagon/rdf-copy.ll
index ce47cf672d7..0a6a43a1cb0 100644
--- a/test/CodeGen/Hexagon/rdf-copy.ll
+++ b/test/CodeGen/Hexagon/rdf-copy.ll
@@ -1,5 +1,5 @@
; RUN: llc -march=hexagon < %s | FileCheck %s
-;
+;
; Check that
; {
; r1 = r0
diff --git a/test/CodeGen/Hexagon/split-const32-const64.ll b/test/CodeGen/Hexagon/split-const32-const64.ll
index 95741462e50..30bc5ed3225 100644
--- a/test/CodeGen/Hexagon/split-const32-const64.ll
+++ b/test/CodeGen/Hexagon/split-const32-const64.ll
@@ -9,7 +9,7 @@
@lb = external global i64
; CHECK-LABEL: test1:
-; CHECK-NOT: CONST32
+; CHECK-NOT: CONST32
define void @test1() nounwind {
entry:
br label %block