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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-04 17:18:51 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-04 17:18:51 +0000 |
| commit | ca0df55065b11f2310f55c731b2f990d09ae1c32 (patch) | |
| tree | fff52bf80df56346069e50ec52b17a4e36907e87 /test/CodeGen/Hexagon | |
| parent | 93356784e0e357e3f1f74d565480cc9c25ea4bc9 (diff) | |
[CodeGen] Unify MBB reference format in both MIR and debug output
As part of the unification of the debug format and the MIR format, print
MBB references as '%bb.5'.
The MIR printer prints the IR name of a MBB only for block definitions.
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g'
* find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g'
* find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g'
* grep -nr 'BB#' and fix
Differential Revision: https://reviews.llvm.org/D40422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319665 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon')
| -rw-r--r-- | test/CodeGen/Hexagon/branch-folder-hoist-kills.mir | 2 | ||||
| -rw-r--r-- | test/CodeGen/Hexagon/hwloop-redef-imm.mir | 4 | ||||
| -rw-r--r-- | test/CodeGen/Hexagon/ifcvt-edge-weight.ll | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir b/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir index 47da85b2308..c685a0c2740 100644 --- a/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir +++ b/test/CodeGen/Hexagon/branch-folder-hoist-kills.mir @@ -11,7 +11,7 @@ # then created code, where the first predicated instruction has incorrect # implicit use of r0: # -# BB#0: +# %bb.0: # Live Ins: %R0 # %R1<def> = A2_sxth %R0<kill> ; hoisted, kills r0 # A2_nop %P0<imp-def> diff --git a/test/CodeGen/Hexagon/hwloop-redef-imm.mir b/test/CodeGen/Hexagon/hwloop-redef-imm.mir index 014908e20a7..7b6044c9a50 100644 --- a/test/CodeGen/Hexagon/hwloop-redef-imm.mir +++ b/test/CodeGen/Hexagon/hwloop-redef-imm.mir @@ -8,10 +8,10 @@ # loop setup in the preheader). # CHECK: [[R0:%[0-9]+]]:intregs = A2_tfrsi 1920 -# CHECK: J2_loop0r %bb.1.b1, [[R0]] +# CHECK: J2_loop0r %bb.1, [[R0]] # # CHECK: bb.1.b1 (address-taken): -# CHECK: ENDLOOP0 %bb.1.b1 +# CHECK: ENDLOOP0 %bb.1 --- | diff --git a/test/CodeGen/Hexagon/ifcvt-edge-weight.ll b/test/CodeGen/Hexagon/ifcvt-edge-weight.ll index 341567e1d02..250a81938bd 100644 --- a/test/CodeGen/Hexagon/ifcvt-edge-weight.ll +++ b/test/CodeGen/Hexagon/ifcvt-edge-weight.ll @@ -1,8 +1,8 @@ ; RUN: llc -march=hexagon -mcpu=hexagonv5 -hexagon-eif=0 -print-machineinstrs=if-converter %s -o /dev/null 2>&1 | FileCheck %s ; Check that the edge weights are updated correctly after if-conversion. -; CHECK: BB#3: -; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}10.00%) BB#1({{[0-9a-fx/= ]+}}90.00%) +; CHECK: %bb.3: +; CHECK: Successors according to CFG: %bb.2({{[0-9a-fx/= ]+}}10.00%) %bb.1({{[0-9a-fx/= ]+}}90.00%) @a = external global i32 @d = external global i32 |