diff options
| author | Craig Topper <craig.topper@intel.com> | 2017-08-30 05:00:35 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-30 05:00:35 +0000 |
| commit | 4dde563ddf1ac3b4c80fa2a12949c92d2107c5f1 (patch) | |
| tree | 5426c1ec260283cdfbd11dec00c2b0407062acd2 /lib/Target/X86/X86.td | |
| parent | a8215489bb5a7edd5f1db3bce4f43b02456a4e99 (diff) | |
[X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well
Currently we start applying this on Haswell and newer. I don't believe anything changed in the Haswell architecture to make this the right cutoff point. The partial flag handling around this has been roughly the same since Sandybridge.
Differential Revision: https://reviews.llvm.org/D37250
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312099 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86.td')
| -rw-r--r-- | lib/Target/X86/X86.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td index 888af176a86..6856bd21670 100644 --- a/lib/Target/X86/X86.td +++ b/lib/Target/X86/X86.td @@ -528,6 +528,7 @@ def SNBFeatures : ProcessorFeatures<[], [ FeatureSlow3OpsLEA, FeatureFastScalarFSQRT, FeatureFastSHLDRotate, + FeatureSlowIncDec, FeatureMacroFusion ]>; @@ -560,8 +561,7 @@ def HSWFeatures : ProcessorFeatures<IVBFeatures.Value, [ FeatureERMSB, FeatureFMA, FeatureLZCNT, - FeatureMOVBE, - FeatureSlowIncDec + FeatureMOVBE ]>; class HaswellProc<string Name> : ProcModel<Name, HaswellModel, |