diff options
| author | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2017-07-04 16:35:26 +0000 |
|---|---|---|
| committer | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2017-07-04 16:35:26 +0000 |
| commit | cad1431a1e4e8f9ceb11d463682fd868897d7af6 (patch) | |
| tree | 7bf6377e6b46ecf8e17bd3d0de76fd870eaac2ad /lib/Target/NVPTX | |
| parent | a07988d18525074fa858d11032a10e3c3bbdfb4f (diff) | |
fix trivial typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307094 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX')
| -rw-r--r-- | lib/Target/NVPTX/NVPTXISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/NVPTX/NVPTXISelLowering.cpp b/lib/Target/NVPTX/NVPTXISelLowering.cpp index f26b9a7cb8d..54579d0267f 100644 --- a/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -2456,7 +2456,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( // v2f16 was loaded as an i32. Now we must bitcast it back.
else if (EltVT == MVT::v2f16)
Elt = DAG.getNode(ISD::BITCAST, dl, MVT::v2f16, Elt);
- // Extend the element if necesary (e.g. an i8 is loaded
+ // Extend the element if necessary (e.g. an i8 is loaded
// into an i16 register)
if (Ins[InsIdx].VT.isInteger() &&
Ins[InsIdx].VT.getSizeInBits() > LoadVT.getSizeInBits()) {
|