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authorJoel Stanley <joel@jms.id.au>2016-08-30 17:24:27 +0930
committerLinus Walleij <linus.walleij@linaro.org>2016-09-07 16:56:47 +0200
commit361b79119a4b7f53f728913b5ed2c8d2d10c16f5 (patch)
treebb31d4df905d64d1973d3ab9a97bd3ee73d6abc7 /drivers/gpio/Kconfig
parent19de85134ee92d927044cc620961a322bfde9119 (diff)
gpio: Add Aspeed driver
The Aspeed SoCs contain GPIOs banked by letter, where each bank contains 8 pins. The GPIO banks are then grouped in sets of four in the register layout. The implementation exposes multiple banks through the one driver and requests and releases pins via the pinctrl subsystem. The hardware supports generation of interrupts from all GPIO-capable pins. A number of hardware features are not yet supported: Configuration of interrupt direction (ARM or LPC), debouncing, and WDT reset tolerance for output ports. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/Kconfig')
-rw-r--r--drivers/gpio/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 5eb7c864d4a5..17842e6a56dc 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -106,6 +106,13 @@ config GPIO_AMDPT
driver for GPIO functionality on Promontory IOHub
Require ACPI ASL code to enumerate as a platform device.
+config GPIO_ASPEED
+ tristate "Aspeed GPIO support"
+ depends on (ARCH_ASPEED || COMPILE_TEST) && OF_GPIO
+ select GPIOLIB_IRQCHIP
+ help
+ Say Y here to support Aspeed AST2400 and AST2500 GPIO controllers.
+
config GPIO_ATH79
tristate "Atheros AR71XX/AR724X/AR913X GPIO support"
default y if ATH79