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authorLinus Torvalds <torvalds@linux-foundation.org>2016-08-01 07:23:29 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-08-01 07:23:29 -0400
commit77d9ada23f207ec3d6258985c882f4fb653693f1 (patch)
tree84d28d876721d3063ff1b33ab4b16c86ceafb5a7 /Documentation
parent07f00f06ba9a5533d6650d46d3e938f6cbeee97e (diff)
parenta68b216676e89fa959a23b583b56f9ce7df81b37 (diff)
Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jussi Brar: "Broadcom: - New PDC controller driver and bindings Misc: - PL320 - Convert from 'raw' IO to 'relaxed' version - Test - fix dangling pointer" * 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: Fix format and type mismatches in Broadcom PDC driver mailbox: Add Broadcom PDC mailbox driver dt-bindings: add bindings documentation for PDC driver. mailbox: pl320: remove __raw IO mailbox: mailbox-test: set tdev->signal to NULL after freeing
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt
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index 000000000000..411ccf421584
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt
@@ -0,0 +1,23 @@
+The PDC driver manages data transfer to and from various offload engines
+on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
+one device tree entry per block.
+
+Required properties:
+- compatible : Should be "brcm,iproc-pdc-mbox".
+- reg: Should contain PDC registers location and length.
+- interrupts: Should contain the IRQ line for the PDC.
+- #mbox-cells: 1
+- brcm,rx-status-len: Length of metadata preceding received frames, in bytes.
+
+Optional properties:
+- brcm,use-bcm-hdr: present if a BCM header precedes each frame.
+
+Example:
+ pdc0: iproc-pdc0@0x612c0000 {
+ compatible = "brcm,iproc-pdc-mbox";
+ reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ #mbox-cells = <1>; /* one cell per mailbox channel */
+ brcm,rx-status-len = <32>;
+ brcm,use-bcm-hdr;
+ };