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2020-05-11rs6000: Built-in cleanups for vec_clzm, vec_ctzm, and vec_gnbKelvin Nilsen
Changes to the built-in specification occurred after early patches added support for these. The name of vec_clzm became vec_cntlzm, and vec_ctzm became vec_cnttzm. Four of the overloaded forms of vec_gnb were removed, and the fourth argument redefined as an unsigned int, not an unsigned char. This patch reflects those changes in the code and test cases. Eight of the vec_gnb test cases are removed as a result. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm. (vec_ctzm): Rename to vec_cnttzm. * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Change fourth operand for vec_ternarylogic to require compatibility with unsigned SImode rather than unsigned QImode. * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Remove overloaded forms of vec_gnb that are no longer needed. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Replace vec_clzm with vec_cntlzm; replace vec_ctzm with vec_cntlzm; remove four unwanted forms of vec_gnb; move vec_ternarylogic documentation into this section and replace const unsigned char with const unsigned int as its fourth argument. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-clzm-0.c: Rename to... * gcc.target/powerpc/vec-cntlzm-0.c: ...this. * gcc.target/powerpc/vec-clzm-1.c: Rename to... * gcc.target/powerpc/vec-cntlzm-1.c: ...this. * gcc.target/powerpc/vec-ctzm-0.c: Rename to... * gcc.target/powerpc/vec-cnttzm-0.c: ...this. * gcc.target/powerpc/vec-ctzm-1.c: Rename to... * gcc.target/powerpc/vec-cnttzm-1.c: ...this. * gcc.target/powerpc/vec-gnb-8.c: Rename to... * gcc.target/powerpc/vec-gnb-0.c: ...this, deleting the old file. * gcc.target/powerpc/vec-gnb-9.c: Rename to... * gcc.target/powerpc/vec-gnb-1.c: ...this, deleting the old file. * gcc.target/powerpc/vec-gnb-10.c: Rename to... * gcc.target/powerpc/vec-gnb-2.c: ...this, deleting the old file. * gcc.target/powerpc/vec-gnb-3.c: Delete. * gcc.target/powerpc/vec-gnb-4.c: Delete. * gcc.target/powerpc/vec-gnb-5.c: Delete. * gcc.target/powerpc/vec-gnb-6.c: Delete. * gcc.target/powerpc/vec-gnb-7.c: Delete.
2020-05-11rs6000: Add xxgenpcvwm and xxgenpcvdmCarl Love
Add support for xxgenpcv[dw]m, along with individual and overloaded built-in functions for access. [gcc] 2020-05-11 Carl Love <cel@us.ibm.com> * config/rs6000/altivec.h (vec_genpcvm): New #define. * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in instantiation. (XXGENPCVM_V8HI): Likewise. (XXGENPCVM_V4SI): Likewise. (XXGENPCVM_V2DI): Likewise. (XXGENPCVM): New overloaded built-in instantiation. * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for FUTURE_BUILTIN_VEC_XXGENPCVM. (altivec_expand_builtin): Add special handling for FUTURE_BUILTIN_VEC_XXGENPCVM. (builtin_function_type): Add handling for FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}. * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator. (UNSPEC_XXGENPCV): New constant. (xxgenpcvm_<mode>_internal): New insn. (xxgenpcvm_<mode>): New expansion. * doc/extend.texi: Add documentation for vec_genpcvm built-ins. [gcc/testsuite] 2020-05-11 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/xxgenpc-runnable.c: New.
2020-05-11rs6000: Vector string isolate instructionsKelvin Nilsen
Adds new instructions vstribr, vstrihr, vstribl, and vstrihl, with overloaded built-in support. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.h (vec_strir): New #define. (vec_stril): Likewise. (vec_strir_p): Likewise. (vec_stril_p): Likewise. * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant. (UNSPEC_VSTRIL): Likewise. (vstrir_<mode>): New expansion. (vstrir_code_<mode>): New insn. (vstrir_p_<mode>): New expansion. (vstrir_p_code_<mode>): New insn. (vstril_<mode>): New expansion. (vstril_code_<mode>): New insn. (vstril_p_<mode>): New expansion. (vstril_p_code_<mode>): New insn. * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr): New built-in function. (__builtin_altivec_vstrihr): Likewise. (__builtin_altivec_vstribl): Likewise. (__builtin_altivec_vstrihl): Likewise. (__builtin_altivec_vstribr_p): Likewise. (__builtin_altivec_vstrihr_p): Likewise. (__builtin_altivec_vstribl_p): Likewise. (__builtin_altivec_vstrihl_p): Likewise. (__builtin_vec_strir): New overloaded built-in function. (__builtin_vec_stril): Likewise. (__builtin_vec_strir_p): Likewise. (__builtin_vec_stril_p): Likewise. * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Define overloaded forms of __builtin_vec_strir, __builtin_vec_stril, __builtin_vec_strir_p, and __builtin_vec_stril_p. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Add description of vec_stril, vec_stril_p, vec_strir, and vec_strir_p built-in functions. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-stril-0.c: New. * gcc.target/powerpc/vec-stril-1.c: New. * gcc.target/powerpc/vec-stril-10.c: New. * gcc.target/powerpc/vec-stril-11.c: New. * gcc.target/powerpc/vec-stril-12.c: New. * gcc.target/powerpc/vec-stril-13.c: New. * gcc.target/powerpc/vec-stril-14.c: New. * gcc.target/powerpc/vec-stril-15.c: New. * gcc.target/powerpc/vec-stril-16.c: New. * gcc.target/powerpc/vec-stril-17.c: New. * gcc.target/powerpc/vec-stril-18.c: New. * gcc.target/powerpc/vec-stril-19.c: New. * gcc.target/powerpc/vec-stril-2.c: New. * gcc.target/powerpc/vec-stril-20.c: New. * gcc.target/powerpc/vec-stril-21.c: New. * gcc.target/powerpc/vec-stril-22.c: New. * gcc.target/powerpc/vec-stril-23.c: New. * gcc.target/powerpc/vec-stril-3.c: New. * gcc.target/powerpc/vec-stril-4.c: New. * gcc.target/powerpc/vec-stril-5.c: New. * gcc.target/powerpc/vec-stril-6.c: New. * gcc.target/powerpc/vec-stril-7.c: New. * gcc.target/powerpc/vec-stril-8.c: New. * gcc.target/powerpc/vec-stril-9.c: New. * gcc.target/powerpc/vec-stril_p-0.c: New. * gcc.target/powerpc/vec-stril_p-1.c: New. * gcc.target/powerpc/vec-stril_p-10.c: New. * gcc.target/powerpc/vec-stril_p-11.c: New. * gcc.target/powerpc/vec-stril_p-2.c: New. * gcc.target/powerpc/vec-stril_p-3.c: New. * gcc.target/powerpc/vec-stril_p-4.c: New. * gcc.target/powerpc/vec-stril_p-5.c: New. * gcc.target/powerpc/vec-stril_p-6.c: New. * gcc.target/powerpc/vec-stril_p-7.c: New. * gcc.target/powerpc/vec-stril_p-8.c: New. * gcc.target/powerpc/vec-stril_p-9.c: New. * gcc.target/powerpc/vec-strir-0.c: New. * gcc.target/powerpc/vec-strir-1.c: New. * gcc.target/powerpc/vec-strir-10.c: New. * gcc.target/powerpc/vec-strir-11.c: New. * gcc.target/powerpc/vec-strir-12.c: New. * gcc.target/powerpc/vec-strir-13.c: New. * gcc.target/powerpc/vec-strir-14.c: New. * gcc.target/powerpc/vec-strir-15.c: New. * gcc.target/powerpc/vec-strir-16.c: New. * gcc.target/powerpc/vec-strir-17.c: New. * gcc.target/powerpc/vec-strir-18.c: New. * gcc.target/powerpc/vec-strir-19.c: New. * gcc.target/powerpc/vec-strir-2.c: New. * gcc.target/powerpc/vec-strir-20.c: New. * gcc.target/powerpc/vec-strir-21.c: New. * gcc.target/powerpc/vec-strir-22.c: New. * gcc.target/powerpc/vec-strir-23.c: New. * gcc.target/powerpc/vec-strir-3.c: New. * gcc.target/powerpc/vec-strir-4.c: New. * gcc.target/powerpc/vec-strir-5.c: New. * gcc.target/powerpc/vec-strir-6.c: New. * gcc.target/powerpc/vec-strir-7.c: New. * gcc.target/powerpc/vec-strir-8.c: New. * gcc.target/powerpc/vec-strir-9.c: New. * gcc.target/powerpc/vec-strir_p-0.c: New. * gcc.target/powerpc/vec-strir_p-1.c: New. * gcc.target/powerpc/vec-strir_p-10.c: New. * gcc.target/powerpc/vec-strir_p-11.c: New. * gcc.target/powerpc/vec-strir_p-2.c: New. * gcc.target/powerpc/vec-strir_p-3.c: New. * gcc.target/powerpc/vec-strir_p-4.c: New. * gcc.target/powerpc/vec-strir_p-5.c: New. * gcc.target/powerpc/vec-strir_p-6.c: New. * gcc.target/powerpc/vec-strir_p-7.c: New. * gcc.target/powerpc/vec-strir_p-8.c: New. * gcc.target/powerpc/vec-strir_p-9.c: New.
2020-05-11rs6000: Add xxeval and vec_ternarylogicKelvin Nilsen
Add the xxeval insn and access it via the vec_ternarylogic built-in function. As part of this, add support to the built-in function infrastructure for functions that take four arguments. [gcc] 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com> * config/rs6000/altivec.h (vec_ternarylogic): New #define. * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant. (xxeval): New insn. * config/rs6000/predicates.md (u8bit_cint_operand): New predicate. * config/rs6000/rs6000-builtin.def: Add handling of new macro RS6000_BUILTIN_4. (BU_FUTURE_V_4): New macro. Use it. (BU_FUTURE_OVERLOAD_4): Likewise. * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add handling for quaternary built-in functions. (altivec_resolve_overloaded_builtin): Add special-case handling for __builtin_vec_xxeval. * config/rs6000/rs6000-call.c: Add handling of new macro RS6000_BUILTIN_4 in initialization of rs6000_builtin_info, bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg, bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays. (altivec_overloaded_builtins): Add definitions for FUTURE_BUILTIN_VEC_XXEVAL. (bdesc_4arg): New array. (htm_expand_builtin): Add handling for quaternary built-in functions. (rs6000_expand_quaternop_builtin): New function. (rs6000_expand_builtin): Add handling for quaternary built-in functions. (rs6000_init_builtins): Initialize builtin_mode_to_type entries for unsigned QImode and unsigned HImode. (builtin_quaternary_function_type): New function. (rs6000_common_init_builtins): Add handling of quaternary operations. * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined constant. (RS6000_BTC_PREDICATE): Change value of constant. (RS6000_BTC_ABS): Likewise. (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4. * doc/extend.texi (PowerPC AltiVec Built-In Functions Available for a Future Architecture): Add description of vec_ternarylogic built-in function. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com> * gcc.target/powerpc/vec-ternarylogic-0.c: New. * gcc.target/powerpc/vec-ternarylogic-1.c: New. * gcc.target/powerpc/vec-ternarylogic-10.c: New. * gcc.target/powerpc/vec-ternarylogic-2.c: New. * gcc.target/powerpc/vec-ternarylogic-3.c: New. * gcc.target/powerpc/vec-ternarylogic-4.c: New. * gcc.target/powerpc/vec-ternarylogic-5.c: New. * gcc.target/powerpc/vec-ternarylogic-6.c: New. * gcc.target/powerpc/vec-ternarylogic-7.c: New. * gcc.target/powerpc/vec-ternarylogic-8.c: New. * gcc.target/powerpc/vec-ternarylogic-9.c: New.
2020-05-11rs6000: Add pdepd and pextdKelvin Nilsen
Add scalar instructions for parallel bit deposit and extract, with built-in function support. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in function. (__builtin_pextd): Likewise. * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant. (UNSPEC_PEXTD): Likewise. (pdepd): New insn. (pextd): Likewise. * doc/extend.texi (Basic PowerPC Built-in Functions Available for a Future Architecture): Add descriptions of __builtin_pdepd and __builtin_pextd functions. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/pdep-0.c: New. * gcc.target/powerpc/pdep-1.c: New. * gcc.target/powerpc/pextd-0.c: New. * gcc.target/powerpc/pextd-1.c: New.
2020-05-11rs6000: Add vclrlb and vclrrbKelvin Nilsen
Add new vector instructions to clear leftmost and rightmost bytes. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.h (vec_clrl): New #define. (vec_clrr): Likewise. * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant. (UNSPEC_VCLRRB): Likewise. (vclrlb): New insn. (vclrrb): Likewise. * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New built-in function. (__builtin_altivec_vclrrb): Likewise. (__builtin_vec_clrl): New overloaded built-in function. (__builtin_vec_clrr): Likewise. * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Define overloaded forms of __builtin_vec_clrl and __builtin_vec_clrr. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Add descriptions of vec_clrl and vec_clrr. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-clrl-0.c: New. * gcc.target/powerpc/vec-clrl-1.c: New. * gcc.target/powerpc/vec-clrr-0.c: New. * gcc.target/powerpc/vec-clrr-1.c: New.
2020-05-11Fix change log ordering from previous commitBill Schmidt
2020-05-11rs6000: Add cntlzdm and cnttzdmKelvin Nilsen
Add support for new scalar instructions for counting leading or trailing zeros under control of a bitmask. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New built-in function definition. (__builtin_cnttzdm): Likewise. * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant. (UNSPEC_CNTTZDM): Likewise. (cntlzdm): New insn. (cnttzdm): Likewise. * doc/extend.texi (Basic PowerPC Built-in Functions available for a Future Architecture): Add descriptions of __builtin_cntlzdm and __builtin_cnttzdm functions. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/cntlzdm-0.c: New test. * gcc.target/powerpc/cntlzdm-1.c: New test. * gcc.target/powerpc/cnttzdm-0.c: New test. * gcc.target/powerpc/cnttzdm-1.c: New test.
2020-05-11c++: Fix specialization of constrained member template.Jason Merrill
The resolution of comment CA104 clarifies that we need to do direct substitution of constraints in order to determine which member template corresponds to an explicit specialization. gcc/cp/ChangeLog 2020-05-11 Jason Merrill <jason@redhat.com> Resolve C++20 NB comment CA104 * pt.c (determine_specialization): Compare constraints for specialization of member template of class instantiation.
2020-05-11c++: tree walk into TYPENAME_TYPE.Jason Merrill
While looking at 92583/92654 it occurred to me that typename types needed the same fix. So extract_locals_r also needs to see the TYPE_CONTEXT of a TYPENAME_TYPE. But it must not look through a typedef. Most tree walking in the front end wants to walk through the syntactic form of a type of expression, and doesn't care about the type referred to by a typedef. But min_vis_r does care. gcc/cp/ChangeLog 2020-05-11 Jason Merrill <jason@redhat.com> PR c++/92583 PR c++/92654 * tree.c (cp_walk_subtrees): Stop at typedefs. Handle TYPENAME_TYPE here. * pt.c (find_parameter_packs_r): Not here. (for_each_template_parm_r): Clear *walk_subtrees. * decl2.c (min_vis_r): Look through typedefs.
2020-05-11c++: Better diagnostic in converted const expr.Jason Merrill
This improves the diagnostic from error: could not convert ‘((A<>*)(void)0)->A<>::e’ from ‘<unresolved overloaded function type>’ to ‘bool’ to error: cannot convert ‘A<>::e’ from type ‘void (A<>::)()’ to type ‘bool’ gcc/cp/ChangeLog 2020-05-11 Jason Merrill <jason@redhat.com> * call.c (implicit_conversion_error): Split out from... (perform_implicit_conversion_flags): ...here. (build_converted_constant_expr_internal): Use it.
2020-05-11c++: Use of 'this' in parameter declaration [PR90748]Jason Merrill
We were incorrectly accepting the use of 'this' at parse time and then crashing when we tried to instantiate it. It is invalid because 'this' is not in scope until after the function-cv-quals. So let's hoist setting current_class_ptr up from cp_parser_late_return_type_opt into cp_parser_direct_declarator where it can work for noexcept as well. gcc/cp/ChangeLog 2020-05-11 Jason Merrill <jason@redhat.com> PR c++/90748 * parser.c (inject_parm_decls): Set current_class_ptr here. (cp_parser_direct_declarator): And here. (cp_parser_late_return_type_opt): Not here. (cp_parser_noexcept_specification_opt): Nor here. (cp_parser_exception_specification_opt) (cp_parser_late_noexcept_specifier): Remove unneeded parameters.
2020-05-11PR fortran/95053 - ICE in gfc_divide(): Bad basic typeHarald Anlauf
The fix for PR 93499 introduced a too strict check in gfc_divide that could trigger errors in the early parsing phase. Relax the check and defer to a later stage. gcc/fortran/ 2020-05-11 Harald Anlauf <anlauf@gmx.de> PR fortran/95053 * arith.c (gfc_divide): Do not error out if operand 2 is non-numeric. Defer checks to later stage. gcc/testsuite/ 2020-05-11 Harald Anlauf <anlauf@gmx.de> PR fortran/95053 * gfortran.dg/pr95053.f: New test.
2020-05-11c++: Make references to __cxa_pure_virtual weak.Jason Merrill
If a program has no other dependencies on libstdc++, we shouldn't require it just for __cxa_pure_virtual, which is only there to give a prettier diagnostic before crashing the program; resolving the reference to NULL will also crash, just without the diagnostic. gcc/cp/ChangeLog 2020-05-11 Jason Merrill <jason@redhat.com> * decl.c (cxx_init_decl_processing): Call declare_weak for __cxa_pure_virtual.
2020-05-11c++: Avoid unnecessary deprecated warnings.Jason Merrill
There's no need to warn that a deprecated function uses a deprecated type, that just adds noise. We were preventing that in start_decl, but that didn't help member declarations that go through grokfield. So handle it in grokdeclarator instead, which is shared between them. gcc/cp/ChangeLog 2020-05-11 Jason Merrill <jason@redhat.com> * decl.c (grokdeclarator): Adjust deprecated_state here. (start_decl): Not here.
2020-05-11i386: Add V2SFmode sqrt insn pattern [PR95046]Uros Bizjak
gcc/ChangeLog: 2020-05-11 Uroš Bizjak <ubizjak@gmail.com> PR target/95046 * config/i386/mmx.md (sqrtv2sf2): New insn pattern. testsuite/ChangeLog: 2020-05-11 Uroš Bizjak <ubizjak@gmail.com> PR target/95046 * gcc.target/i386/pr95046-1.c (test_sqrt): Add.
2020-05-11rs6000: Add vcfuged instructionKelvin Nilsen
Add the new vector centrifuge-doubleword instruction and built-in function access. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.h (vec_cfuge): New #define. * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant. (vcfuged): New insn. * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged): New built-in function. * config/rs6000/rs6000-call.c (builtin_function_type): Add handling for FUTURE_BUILTIN_VCFUGED case. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Add description of vec_cfuge built-in function. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-cfuged-0.c: New test. * gcc.target/powerpc/vec-cfuged-1.c: New test.
2020-05-11rs6000: Add scalar cfuged instructionKelvin Nilsen
Add the centifuge-doubleword instruction and built-in access. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New #define. (BU_FUTURE_MISC_1): Likewise. (BU_FUTURE_MISC_2): Likewise. (BU_FUTURE_MISC_3): Likewise. (__builtin_cfuged): New built-in function definition. * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant. (cfuged): New insn. * doc/extend.texi (Basic PowerPC Built-in Functions Available for a Future Architecture): New subsubsection. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target.powerpc/cfuged-0.c: New test. * gcc.target.powerpc/cfuged-1.c: New test.
2020-05-11tree-optimization/95049 - fix not terminating RPO VN iterationRichard Biener
This rejects lattice changes from one constant to another. 2020-05-11 Richard Biener <rguenther@suse.de> PR tree-optimization/95049 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition between different constants. * gcc.dg/torture/pr95049.c: New testcase.
2020-05-11rs6000: Add vgnbKelvin Nilsen
Add support for the vgnb instruction, which gathers every Nth bit per vector element. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> Bill Schmidt <wschmidt@linux.ibm.com> * config/rs6000/altivec.h (vec_gnb): New #define. * config/rs6000/altivec.md (UNSPEC_VGNB): New constant. (vgnb): New insn. * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New #define. (BU_FUTURE_OVERLOAD_2): Likewise. (BU_FUTURE_OVERLOAD_3): Likewise. (__builtin_altivec_gnb): New built-in function. (__buiiltin_vec_gnb): New overloaded built-in function. * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Define overloaded forms of __builtin_vec_gnb. (rs6000_expand_binop_builtin): Add error checking for 2nd argument of __builtin_vec_gnb. (builtin_function_type): Mark return value and arguments unsigned for FUTURE_BUILTIN_VGNB. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Add description of vec_gnb built-in function. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> Bill Schmidt <wschmidt@linux.ibm.com> * gcc.target/powerpc/vec-gnb-0.c: New test. * gcc.target/powerpc/vec-gnb-1.c: New test. * gcc.target/powerpc/vec-gnb-10.c: New test. * gcc.target/powerpc/vec-gnb-2.c: New test. * gcc.target/powerpc/vec-gnb-3.c: New test. * gcc.target/powerpc/vec-gnb-4.c: New test. * gcc.target/powerpc/vec-gnb-5.c: New test. * gcc.target/powerpc/vec-gnb-6.c: New test. * gcc.target/powerpc/vec-gnb-7.c: New test. * gcc.target/powerpc/vec-gnb-8.c: New test. * gcc.target/powerpc/vec-gnb-9.c: New test.
2020-05-11rs6000: Add vector pdep/pextKelvin Nilsen
Add support for the vpdepd and vpextd instructions that perform vector parallel bit deposit and vector parallel bit extract. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> Bill Schmidt <wschmidt@linux.ibm.com> * config/rs6000/altivec.h (vec_pdep): New macro implementing new built-in function. (vec_pext): Likewise. * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant. (UNSPEC_VPEXTD): Likewise. (vpdepd): New insn. (vpextd): Likewise. * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New built-in function. (__builtin_altivec_vpextd): Likewise. * config/rs6000/rs6000-call.c (builtin_function_type): Add handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD cases. * doc/extend.texi (PowerPC Altivec Built-in Functions Available for a Future Architecture): Add description of vec_pdep and vec_pext built-in functions. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-pdep-0.c: New. * gcc.target/powerpc/vec-pdep-1.c: New. * gcc.target/powerpc/vec-pext-0.c: New. * gcc.target/powerpc/vec-pext-1.c: New.
2020-05-11rs6000: Add vector count under maskKelvin Nilsen
Add support for new vclzdm and vctzdm vector instructions that count leading and trailing zeros under control of a mask. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> Bill Schmidt <wschmidt@linux.ibm.com> * config/rs6000/altivec.h (vec_clzm): New macro. (vec_ctzm): Likewise. * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant. (UNSPEC_VCTZDM): Likewise. (vclzdm): New insn. (vctzdm): Likewise. * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro. (BU_FUTURE_V_1): Likewise. (BU_FUTURE_V_2): Likewise. (BU_FUTURE_V_3): Likewise. (__builtin_altivec_vclzdm): New builtin definition. (__builtin_altivec_vctzdm): Likewise. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is set. * config/rs6000/rs6000-call.c (builtin_function_type): Set return value and parameter types to be unsigned for VCLZDM and VCTZDM. * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add support for TARGET_FUTURE flag. * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant. * doc/extend.texi (PowerPC Altivec Built-in Functions Available for a Future Architecture): New subsubsection. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-clzm-0.c: New test. * gcc.target/powerpc/vec-clzm-1.c: New test. * gcc.target/powerpc/vec-ctzm-0.c: New test. * gcc.target/powerpc/vec-ctzm-1.c: New test.
2020-05-11tree-optimization/94988 - enhance SM some moreRichard Biener
This enhances store-order preserving store motion to handle the case of non-invariant dependent stores in the sequence of unconditionally executed stores on exit by re-issueing them as part of the sequence of stores on the exit. This fixes the observed regression of gcc.target/i386/pr64110.c which relies on store-motion of 'b' for a loop like for (int i = 0; i < j; ++i) *b++ = x; where for correctness we now no longer apply store-motion. With the patch we emit the correct tem = b; for (int i = 0; i < j; ++i) { tem = tem + 1; *tem = x; } b = tem; *tem = x; preserving the original order of stores. A testcase reflecting the miscompilation done by earlier GCC is added as well. This also fixes the reported ICE in PR95025 and adds checking code to catch it earlier - the issue was not-supported refs propagation leaving stray refs in the sequence. 2020-05-11 Richard Biener <rguenther@suse.de> PR tree-optimization/94988 PR tree-optimization/95025 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from. (sm_seq_push_down): Take extra parameter denoting where we moved the ref to. (execute_sm_exit): Re-issue sm_other stores in the correct order. (sm_seq_valid_bb): When always executed, allow sm_other to prevail inbetween sm_ord and record their stored value. (hoist_memory_references): Adjust refs_not_supported propagation and prune sm_other from the end of the ordered sequences. * gcc.dg/torture/pr94988.c: New testcase. * gcc.dg/torture/pr95025.c: Likewise. * gcc.dg/torture/pr95045.c: Likewise. * g++.dg/asan/pr95025.C: New testcase.
2020-05-11[Fortran] Fix/modify present() handling for assumed-shape optional (PR 94672)Tobias Burnus
gcc/fortran/ 2020-05-07 Tobias Burnus <tobias@codesourcery.com> PR fortran/94672 * trans.h (gfc_conv_expr_present): Add use_saved_decl=false argument. * trans-expr.c (gfc_conv_expr_present): Likewise; use DECL directly and only if use_saved_decl is true, use the actual PARAM_DECL arg (saved descriptor). * trans-array.c (gfc_trans_dummy_array_bias): Set local 'arg.0' variable to NULL if 'arg' is not present. * trans-openmp.c (gfc_omp_check_optional_argument): Simplify by checking 'arg.0' instead of the true PARM_DECL. (gfc_omp_finish_clause): Remove setting 'arg.0' to NULL. gcc/testsuite/ 2020-05-07 Jakub Jelinek <jakub@redhat.com> Tobias Burnus <tobias@codesourcery.com> PR fortran/94672 * gfortran.dg/gomp/pr94672.f90: New. * gfortran.dg/missing_optional_dummy_6a.f90: Update scan-tree.
2020-05-11aarch64: Fix ICE when expanding scalar floating move with ↵Fei Yang
-mgeneral-regs-only. [PR94991] In the testcase for PR94991, we are doing FAIL for scalar floating move expand pattern since TARGET_FLOAT is false with option -mgeneral-regs-only. But move expand pattern cannot fail. It would be better to replace the FAIL with code that bitcasts to the equivalent integer mode using gen_lowpart. 2020-05-11 Felix Yang <felix.yang@huawei.com> gcc/ PR target/94991 * config/aarch64/aarch64.md (mov<mode>): Bitcasts to the equivalent integer mode using gen_lowpart instead of doing FAIL for scalar floating point move. gcc/testsuite/ PR target/94991 * gcc.target/aarch64/mgeneral-regs_5.c: New test.
2020-05-11[PATCH] aarch64: prefer using csinv, csneg in zero extend contextsAlex Coplan
Given the C code: unsigned long long inv(unsigned a, unsigned b, unsigned c) { return a ? b : ~c; } Prior to this patch, AArch64 GCC at -O2 generates: inv: cmp w0, 0 mvn w2, w2 csel w0, w1, w2, ne ret and after applying the patch, we get: inv: cmp w0, 0 csinv w0, w1, w2, ne ret The new pattern also catches the optimization for the symmetric case where the body of foo reads a ? ~b : c. Similarly, with the following code: unsigned long long neg(unsigned a, unsigned b, unsigned c) { return a ? b : -c; } GCC at -O2 previously gave: neg: cmp w0, 0 neg w2, w2 csel w0, w1, w2, ne but now gives: neg: cmp w0, 0 csneg w0, w1, w2, ne ret with the corresponding code for the symmetric case as above. 2020-05-11 Alex Coplan <alex.coplan@arm.com> gcc/ * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case to correctly calculate cost for new pattern (*csinv3_uxtw_insn3). * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New. (*csinv3_uxtw_insn2): New. (*csinv3_uxtw_insn3): New. * config/aarch64/iterators.md (neg_not_cs): New. gcc/testsuite/ * gcc.target/aarch64/csinv-neg.c: New test.
2020-05-11Fix missing files from previous commit.Kelvin Nilsen
2020-05-11rs6000: powerpc_future_ok and powerpc_future_hwKelvin Nilsen
Dejagnu targets for these. 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/dg-future-0.c: New. * gcc.target/powerpc/dg-future-1.c: New. * lib/target-supports.exp (check_powerpc_future_hw_available): Replace -mfuture with -mcpu=future. (check_effective_target_powerpc_future_ok): Likewise. (is-effective-target): Add powerpc_future_hw.
2020-05-11testsuite: Require gnu-tm support for pr94856.CKito Cheng
- The testcase uses the -fgnu-tm option but does not ensure that support is enabled. This patch adds the test to the testcase. * gcc/testsuite/g++.dg/ipa/pr94856.C: Require fgnu-tm.
2020-05-11i386: Vectorize basic V2SFmode operations [PR94913]Uros Bizjak
Enable V2SFmode vectorization and vectorize V2SFmode PLUS, MINUS, MULT, MIN and MAX operations using XMM registers. To avoid unwanted secondary effects (e.g. exceptions), load values to XMM registers using MOVQ that clears high bits of the XMM register outside V2SFmode. The compiler now vectorizes e.g.: float r[2], a[2], b[2]; void test_plus (void) { for (int i = 0; i < 2; i++) r[i] = a[i] + b[i]; } to: movq a(%rip), %xmm0 movq b(%rip), %xmm1 addps %xmm1, %xmm0 movlps %xmm0, r(%rip) ret gcc/ChangeLog: PR target/95046 * config/i386/i386.c (ix86_vector_mode_supported_p): Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE. * config/i386/mmx.md (*mov<mode>_internal): Do not set mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE. (mmx_addv2sf3): Change operand predicates from nonimmediate_operand to register_mmxmem_operand. (addv2sf3): New expander. (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand predicates from nonimmediate_operand to register_mmxmem_operand. Enable instruction pattern for TARGET_MMX_WITH_SSE. (mmx_subv2sf3): Change operand predicate from nonimmediate_operand to register_mmxmem_operand. (mmx_subrv2sf3): Ditto. (subv2sf3): New expander. (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand predicates from nonimmediate_operand to register_mmxmem_operand. Enable instruction pattern for TARGET_MMX_WITH_SSE. (mmx_mulv2sf3): Change operand predicates from nonimmediate_operand to register_mmxmem_operand. (mulv2sf3): New expander. (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand predicates from nonimmediate_operand to register_mmxmem_operand. Enable instruction pattern for TARGET_MMX_WITH_SSE. (mmx_<code>v2sf3): Change operand predicates from nonimmediate_operand to register_mmxmem_operand. (<code>v2sf3): New expander. (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand predicates from nonimmediate_operand to register_mmxmem_operand. Enable instruction pattern for TARGET_MMX_WITH_SSE. (mmx_ieee_<ieee_maxmin>v2sf3): Ditto. testsuite/ChangeLog: PR target/95046 * gcc.target/i386/pr95046-1.c: New test.
2020-05-11Fortran : Spurious warning message with -Wsurprising PR59107Mark Eggleston
This change is from a patch developed for gcc-5. The code has moved on since then requiring a change to interface.c 2020-05-11 Janus Weil <janus@gcc.gnu.org> Dominique d'Humieres <dominiq@lps.ens.fr> gcc/fortran/ PR fortran/59107 * gfortran.h: Rename field resolved as resolve_symbol_called and assign two 2 bits instead of 1. * interface.c (check_dtio_interface1): Use new field name. (gfc_find_typebound_dtio_proc): Use new field name. * resolve.c (gfc_resolve_intrinsic): Replace check of the formal field with resolve_symbol_called is at least 2, if it is not set the field to 2. (resolve_typebound_procedure): Use new field name. (resolve_symbol): Use new field name and check whether it is at least 1, if it is not set the field to 1. 2020-05-11 Mark Eggleston <markeggleston@gcc.gnu.org> gcc/testsuite/ PR fortran/59107 * gfortran.dg/pr59107.f90: New test.
2020-05-10Add handling of MULT_EXPR/PLUS_EXPR for wrapping overflow in affine ↵Xionghu Luo
combination(PR83403) Use determine_value_range to get value range info for fold convert expressions with internal operation PLUS_EXPR/MINUS_EXPR/MULT_EXPR when not overflow on wrapping overflow inner type. i.e.: (long unsigned int)((unsigned int)n * 10 + 1) => (long unsigned int)n * (long unsigned int)10 + (long unsigned int)1 With this patch for affine combination, load/store motion could detect more address refs independency and promote some memory expressions to registers within loop. PS: Replace the previous "(T1)(X + CST) as (T1)X - (T1)(-CST))" to "(T1)(X + CST) as (T1)X + (T1)(CST))" for wrapping overflow. Bootstrap and regression tested pass on Power8-LE. gcc/ChangeLog 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com> PR tree-optimization/83403 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with determine_value_range, Add fold conversion of MULT_EXPR, fix the previous PLUS_EXPR. gcc/testsuite/ChangeLog 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com> PR tree-optimization/83403 * gcc.dg/tree-ssa/pr83403-1.c: New test. * gcc.dg/tree-ssa/pr83403-2.c: New test. * gcc.dg/tree-ssa/pr83403.h: New header.
2020-05-10PR fortran/93499 - ICE on division by zero in declaration statementsHarald Anlauf
Division by zero in declaration statements could sometimes generate NULL pointers being passed around that lead to ICEs. 2020-05-10 Harald Anlauf <anlauf@gmx.de> gcc/fortran/ PR fortran/93499 * arith.c (gfc_divide): Catch division by zero. (eval_intrinsic_f3): Safeguard for NULL operands. gcc/testsuite/ PR fortran/93499 * gfortran.dg/pr93499.f90: New test.
2020-05-09testsuite: Fix up two testcases [PR95008]Jakub Jelinek
two-types-6.c never emitted the warning, even in 4.5/4.6, and pr93382.c doesn't have properly escaped parens, so doesn't check whether they are literally present in the message. 2020-05-09 Jakub Jelinek <jakub@redhat.com> PR testsuite/95008 * gcc.dg/two-types-6.c: Remove dg-warning directive that never triggered. * gcc.dg/analyzer/pr93382.c: Properly escape ()s in the diagnostic message.
2020-05-09gcc/testsuite: Remove traces of crisv32-* outside gcc.target/crisHans-Peter Nilsson
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains). Uses of "cris*" (as opposed to "cris") are deliberately left unadjusted. gcc/testsuite: * gcc.dg/20020919-1.c, gcc.dg/pr31866.c, gcc.dg/pr46647.c, gcc.dg/sibcall-10.c, gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c, gcc.dg/sibcall-9.c, gcc.dg/torture/cris-asm-mof-1.c, gcc.dg/torture/cris-volatile-1.c, gcc.dg/torture/pr38948.c, gcc.dg/tree-ssa/20040204-1.c, gcc.dg/tree-ssa/loop-1.c, gcc.dg/weak/typeof-2.c, lib/target-supports.exp: Remove remaining traces of crisv32-*.
2020-05-09gcc/testsuite: gcc.target/cris: Remove crisv32-* and cris-linux-* tests.Hans-Peter Nilsson
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains). After this, within gcc.target, grep -i v32 and grep -i linux finds no matches, except for a comment in gcc.target/cris/asmreg-1.c, now grammar-corrected. gcc/testsuite: * gcc.target/cris/: Adjust for removing crisv32-* and cris-linux-*.
2020-05-08Improve hard reg preference propapagation.Vladimir N. Makarov
2020-05-08 Vladimir Makarov <vmakarov@redhat.com> * ira-color.c (update_costs_from_allocno): Remove conflict_cost_update_p argument. Propagate costs only along threads. Always do conflict cost update. Add printing debugging info. (update_costs_from_copies): Add printing debugging info. (restore_costs_from_copies): Ditto. (assign_hard_reg): Improve debug info. (push_only_colorable): Ditto. Call update_costs_from_prefs. (color_allocnos): Remove update_costs_from_prefs. 2020-05-08 Vladimir Makarov <vmakarov@redhat.com> * gcc.target/i386/pr92807-1.c: Improve the regex.
2020-05-08coroutines: Update TREE_SIDE_EFFECTS on inserted bind exprs.Iain Sandoe
There are several places where we insert bind expressions while making the coroutine AST transforms. These should be marked as having side-effects where relevant, which had been omitted. This leads to at least one failure in the cppcoros test suite, where a loop body is dropped in gimplification because it is not marked. gcc/cp/ChangeLog: 2020-05-08 Iain Sandoe <iain@sandoe.co.uk> PR c++/95003 * coroutines.cc (build_actor_fn): Ensure that bind scopes are marked as having side-effects where necessary. (replace_statement_captures): Likewise. (morph_fn_to_coro): Likewise. gcc/testsuite/ChangeLog: 2020-05-08 Iain Sandoe <iain@sandoe.co.uk> PR c++/95003 * g++.dg/coroutines/torture/pr95003.C: New test.
2020-05-08preprocessor: Reimplement directives only processing, support raw literals.Nathan Sidwell
The existing directives-only code (a) punched a hole through the libcpp interface and (b) didn't support raw string literals. This reimplements this preprocessing mode. I added a proper callback interface, and adjusted c-ppoutput to use it. Sadly I cannot get rid of the libcpp/internal.h include for unrelated reasons. The new scanner is in lex.x, and works doing some backwards scanning when it finds a charater of interest. This reduces the number of cases one has to deal with in forward scanning. It may have different failure mode than forward scanning on bad tokenization. Finally, Moved some cpp tests from the c-specific dg.gcc/cpp directory to the c-c++-common/cpp shared directory, libcpp/ * directives-only.c: Delete. * Makefile.in (libcpp_a_OBJS, libcpp_a_SOURCES): Remove it. * include/cpplib.h (enum CPP_DO_task): New enum. (cpp_directive_only_preprocess): Declare. * internal.h (_cpp_dir_only_callbacks): Delete. (_cpp_preprocess_dir_only): Delete. * lex.c (do_peek_backslask, do_peek_next, do_peek_prev): New. (cpp_directives_only_process): New implementation. gcc/c-family/ Reimplement directives only processing. * c-ppoutput.c (token_streamer): Ne. (directives_only_cb): New. Swallow ... (print_lines_directives_only): ... this. (scan_translation_unit_directives_only): Reimplment using the published interface. gcc/testsuite/ * gcc.dg/cpp/counter-[23].c: Move to c-c+_-common/cpp. * gcc.dg/cpp/dir-only-*: Likewise. * c-c++-common/cpp/dir-only-[78].c: New.
2020-05-08move permutation validity checkRichard Biener
This delays the SLP permutation check to vectorizable_load and optimizes permutations only after all SLP instances have been generated and the vectorization factor is determined. 2020-05-08 Richard Biener <rguenther@suse.de> * tree-vectorizer.h (vec_info::slp_loads): New. (vect_optimize_slp): Declare. * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do nothing when there are no loads. (vect_gather_slp_loads): Gather loads into a vector. (vect_supported_load_permutation_p): Remove. (vect_analyze_slp_instance): Do not verify permutation validity here. (vect_analyze_slp): Optimize permutations of reductions after all SLP instances have been gathered and gather all loads. (vect_optimize_slp): New function split out from vect_supported_load_permutation_p. Elide some permutations. (vect_slp_analyze_bb_1): Call vect_optimize_slp. * tree-vect-loop.c (vect_analyze_loop_2): Likewise. * tree-vect-stmts.c (vectorizable_load): Check whether the load can be permuted. When generating code assert we can. * gcc.dg/vect/bb-slp-pr68892.c: Adjust for not supported SLP permutations becoming builds from scalars. * gcc.dg/vect/bb-slp-pr78205.c: Likewise. * gcc.dg/vect/bb-slp-34.c: Likewise.
2020-05-08EOF has a locationNathan Sidwell
There's no need to special-case EOF's location. For the complete file we give it a legitimate location. And for deferred parses we now zap a temporary EOF onto the next token, so we can just use its location anyway. gcc/cp/ * parser.c (cp_lexer_set_source_position_from_token): EOF has a location too. gcc/testsuite/ * c-c++-common/raw-string-6.c: Adjust EOF error location. * g++.dg/cpp0x/decltype63.C: Likewise. * g++.dg/cpp0x/gen-attrs-64.C: Likewise. * g++.dg/cpp0x/pr68726.C: Likewise. * g++.dg/cpp0x/pr78341.C: Likewise. * g++.dg/cpp1y/pr65202.C: Likewise. * g++.dg/cpp1z/class-deduction44.C: Likewise. * g++.dg/diagnostic/unclosed-extern-c.C: Likewise. * g++.dg/diagnostic/unclosed-function.C: Likewise. * g++.dg/diagnostic/unclosed-namespace.C: Likewise. * g++.dg/diagnostic/unclosed-struct.C: Likewise. * g++.dg/ext/pr84598.C: Likewise. * g++.dg/other/switch4.C: Likewise. * g++.dg/parse/crash10.C: Likewise. * g++.dg/parse/crash18.C: Likewise. * g++.dg/parse/crash35.C: Likewise. * g++.dg/parse/crash59.C: Likewise. * g++.dg/parse/crash61.C: Likewise. * g++.dg/parse/crash67.C: Likewise. * g++.dg/parse/ctor3.C: Likewise. * g++.dg/parse/error14.C: Likewise. * g++.dg/parse/error5.C: Likewise. * g++.dg/parse/error56.C: Likewise. * g++.dg/parse/invalid1.C: Likewise. * g++.dg/parse/parameter-declaration-1.C: Likewise. * g++.dg/parse/parser-pr28152-2.C: Likewise. * g++.dg/parse/parser-pr28152.C: Likewise. * g++.dg/parse/pr68722.C: Likewise. * g++.dg/pr46852.C: Likewise. * g++.dg/pr46868.C: Likewise. * g++.dg/template/crash115.C: Likewise. * g++.dg/template/crash43.C: Likewise. * g++.dg/template/error-recovery1.C: Likewise. * g++.dg/template/error57.C: Likewise. * g++.old-deja/g++.other/crash31.C: Likewise.
2020-05-08Fix uniqueness of address for aliased objectsEric Botcazou
Two aliased objects must have distinct addresses, even if they have size zero, so we make sure to allocate at least one byte for them. * gcc-interface/decl.c (gnat_to_gnu_entity) <E_Variable>: Force at least the unit size for an aliased object of a constrained nominal subtype whose size is variable.
2020-05-08Fix availability compute during VN DOM eliminationRichard Biener
This fixes an issue with redundant store elimination in FRE/PRE which, when invoked by the DOM elimination walk, ends up using possibly stale availability data from the RPO walk. It also fixes a missed optimization during valueization of addresses by making sure to use get_addr_base_and_unit_offset_1 which can valueize and adjusting that to also valueize ARRAY_REFs low-bound. 2020-05-08 Richard Biener <rguenther@suse.de> * tree-ssa-sccvn.c (rpo_avail): Change type to eliminate_dom_walker *. (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize use the DOM walker availability. (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1 with vn_valueize as valueization callback. (vn_reference_maybe_forwprop_address): Likewise. * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize array_ref_low_bound. * gnat.dg/opt83.adb: New testcase.
2020-05-08match.pd: A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A simplification ↵Jakub Jelinek
[PR94786] We already have x - ((x - y) & -(z < w)) and x + ((y - x) & -(z < w)) simplifications, this one adds x ^ ((x ^ y) & -(z < w)) (not merged using for because of the :c that can be present on bit_xor and can't on minus). 2020-05-08 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/94786 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New simplification. * gcc.dg/tree-ssa/pr94786.c: New test.
2020-05-08ix86: Add peephole2 for *add<mode>3_cc_overflow_1 followed by matching ↵Jakub Jelinek
memory store [PR94857] The following peephole2 changes: - addl (%rdi), %esi + xorl %eax, %eax + addl %esi, (%rdi) setc %al - movl %esi, (%rdi) - movzbl %al, %eax ret on the testcase. *add<mode>3_cc_overflow_1, being an add{l,q} insn, is commutative, so if TARGET_READ_MODIFY_WRITE we can replace addl (%rdi), %esi; movl %esi, (%rdi) with addl %esi, (%rdi) if %esi is dead after those two insns. 2020-05-08 Jakub Jelinek <jakub@redhat.com> PR target/94857 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New define_peephole2. * gcc.target/i386/pr94857.c: New test.
2020-05-08match.pd: Canonicalize (X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs ↵Jakub Jelinek
(X) [PR94783] The following patch canonicalizes M = X >> (prec - 1); (X + M) ^ M for signed integral types into ABS_EXPR (X). For X == min it is already UB because M is -1 and min + -1 is UB, so we can use ABS_EXPR rather than say ABSU_EXPR + cast. The backend might then emit the abs code back using the shift and addition and xor if it is the best sequence for the target, but could do something different that is better. 2020-05-08 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/94783 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)): New simplification. * gcc.dg/tree-ssa/pr94783.c: New test.
2020-05-08match.pd: Optimize ffs of known non-zero arg into ctz + 1 [PR94956]Jakub Jelinek
The ffs expanders on several targets (x86, ia64, aarch64 at least) emit a conditional move or similar code to handle the case when the argument is 0, which makes the code longer. If we know from VRP that the argument will not be zero, we can (if the target has also an ctz expander) just use ctz which is undefined at zero and thus the expander doesn't need to deal with that. 2020-05-08 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/94956 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into __builtin_ctz* + 1 if direct IFN_CTZ is supported. * gcc.target/i386/pr94956.c: New test.
2020-05-08match.pd: Simplify unsigned A - B - 1 >= A to B >= A [PR94913]Jakub Jelinek
Implemented thusly. The TYPE_OVERFLOW_WRAPS is there just because the pattern above it has it too, if you want, I can throw it away from both. 2020-05-08 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/94913 * match.pd (A - B + -1 >= A to B >= A): New simplification. (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always true for TYPE_UNSIGNED integral types. * gcc.dg/tree-ssa/pr94913.c: New test.
2020-05-07rs6000: Tests for setnbcSegher Boessenkool
2020-05-07 Segher Boessenkool <segher@kernel.crashing.org> * gcc.target/powerpc/setnbc.h: New. * gcc.target/powerpc/setnbceq.c: New. * gcc.target/powerpc/setnbcge.c: New. * gcc.target/powerpc/setnbcgt.c: New. * gcc.target/powerpc/setnbcle.c: New. * gcc.target/powerpc/setnbclt.c: New. * gcc.target/powerpc/setnbcne.c: New.
2020-05-07rs6000: Tests for setbcSegher Boessenkool
2020-05-07 Segher Boessenkool <segher@kernel.crashing.org> * gcc.target/powerpc/setbc.h: New. * gcc.target/powerpc/setbceq.c: New. * gcc.target/powerpc/setbcge.c: New. * gcc.target/powerpc/setbcgt.c: New. * gcc.target/powerpc/setbcle.c: New. * gcc.target/powerpc/setbclt.c: New. * gcc.target/powerpc/setbcne.c: New.
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