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gcc/ChangeLog
* common/config/i386/i386-common.c (ix86_handle_option): Set
AVX512DQ when AVX512VP2INTERSECT exists.
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From arch/x86/include/asm/intel-family.h on Linux kernel master branch:
#define INTEL_FAM6_ROCKETLAKE 0xA7
#define INTEL_FAM6_ALDERLAKE 0x97
* common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
Lake and Alder Lake.
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gcc/
* common/config/i386/cpuinfo.h
(get_intel_cpu): Handle sapphirerapids.
* common/config/i386/i386-common.c
(processor_names): Add sapphirerapids and alderlake.
(processor_alias_table): Add sapphirerapids and alderlake.
* common/config/i386/i386-cpuinfo.h
(processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
INTEL_COREI7_ALDERLAKE.
* config.gcc: Add -march=sapphirerapids and alderlake.
* config/i386/driver-i386.c
(host_detect_local_cpu) Handle sapphirerapids and alderlake.
* config/i386/i386-c.c
(ix86_target_macros_internal): Handle sapphirerapids and alderlake.
* config/i386/i386-options.c
(m_SAPPHIRERAPIDS) : Define.
(m_ALDERLAKE): Ditto.
(m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
(processor_cost_table): Add sapphirerapids and alderlake.
(ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
* config/i386/i386.h
(ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
(processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
PROCESSOR_ALDERLAKE.
(PTA_ENQCMD): New.
(PTA_CLDEMOTE): Ditto.
(PTA_SERIALIZE): Ditto.
(PTA_TSXLDTRK): New.
(PTA_SAPPHIRERAPIDS): Ditto.
(PTA_ALDERLAKE): Ditto.
(processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
PROCESSOR_ALDERLAKE.
* doc/extend.texi: Add sapphirerapids and alderlake.
* doc/invoke.texi: Add sapphirerapids and alderlake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.target/i386/mv16.C: Handle new march
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- Arch version should preserved if user explicitly specified the version.
e.g.
After normalize, -march=rv32if3d should be -march=rv32i_f3p0d
instead of-march=rv32ifd.
gcc/ChangeLog:
* common/config/riscv/riscv-common.c (riscv_subset_t): New field
added.
(riscv_subset_list::parsing_subset_version): Add parameter for
indicate explicitly version, and handle explicitly version.
(riscv_subset_list::handle_implied_ext): Ditto.
(riscv_subset_list::add): Ditto.
(riscv_subset_t::riscv_subset_t): Init new field.
(riscv_subset_list::to_string): Always output version info if version
explicitly specified.
(riscv_subset_list::parsing_subset_version): Handle explicitly
arch version.
(riscv_subset_list::parse_std_ext): Ditto.
(riscv_subset_list::parse_multiletter_ext): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/attribute-13.c: New.
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Brand ID was a feature that briefly existed in some Pentium III and
Pentium 4 CPUs. The CPUs that had non-zero brand ID still have had
valid family/model. Brand ID just gives a marketing name for the CPU.
Remove the extra code for brand ID check.
gcc/
PR target/95660
* common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
(cpu_indicator_init): Likewise.
* config/i386/driver-i386.c (host_detect_local_cpu): Updated.
gcc/testsuite/
PR target/95660
* gcc.target/i386/builtin_target.c (check_detailed): Updated.
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All Sky Lake family processors have the same CPUID model number, 0x55.
The differences are Cascade Lake has AVX512VNNI and Cooper Lake has
AVX512VNNI + AVX512BF16. Check AVX512BF16 for Cooper Lake.
PR target/95774
* common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
detection with AVX512BF16.
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Both driver-i386.c and libgcc use CPUID to detect the processor name
as well as available ISAs. To detect the same processor or ISAs, the
same detection logic is duplicated in 2 places. Sometimes only one place
was up to date or got it right. Sometimes both places got it wrong.
1. Add common/config/i386/i386-isas.h to define _isa_names_table.
2. Use isa_names_table to auto-generate ISA command-line options.
3. Use isa_names_table to auto-generate __builtin_cpu_supports tests.
4. Use common/config/i386/cpuinfo.h to check available ISAs and detect
newer Intel processors in driver-i386.c and builtin_target.c.
5. Detection of AMD processors and older processors in driver-i386.c is
unchanged.
gcc/
PR target/95843
* common/config/i386/i386-isas.h: New file. Extracted from
gcc/config/i386/i386-builtins.c.
(_isa_names_table): Add option.
(ISA_NAMES_TABLE_START): New.
(ISA_NAMES_TABLE_END): Likewise.
(ISA_NAMES_TABLE_ENTRY): Likewise.
(isa_names_table): Defined with ISA_NAMES_TABLE_START,
ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
from enum processor_features.
* config/i386/driver-i386.c: Include
"common/config/i386/cpuinfo.h" and
"common/config/i386/i386-isas.h".
(has_feature): New macro.
(host_detect_local_cpu): Call cpu_indicator_init to get CPU
features. Use has_feature to detect processor features. Call
Call get_intel_cpu to get the newer Intel CPU name. Use
isa_names_table to generate command-line options.
* config/i386/i386-builtins.c: Include
"common/config/i386/i386-isas.h".
(_arch_names_table): Removed.
(isa_names_table): Likewise.
gcc/testsuite/
PR target/95843
* gcc.target/i386/builtin_target.c: Include <stdlib.h>,
../../../common/config/i386/i386-cpuinfo.h and
../../../common/config/i386/cpuinfo.h.
(check_amd_cpu_model): Removed.
(check_intel_cpu_model): Likewise,
(CHECK___builtin_cpu_is): New.
(gcc_assert): New. Defined as assert.
(gcc_unreachable): New. Defined as abort.
(inline): New. Defined as empty.
(ISA_NAMES_TABLE_START): Likewise.
(ISA_NAMES_TABLE_END): Likewise.
(ISA_NAMES_TABLE_ENTRY): New.
(check_features): Include
"../../../common/config/i386/i386-isas.h".
(check_detailed): Call cpu_indicator_init. Always call
check_features. Call get_amd_cpu instead of check_amd_cpu_model.
Call get_intel_cpu instead of check_intel_cpu_model.
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Both x86 backend and libgcc define enum processor_features. libgcc sets
enum processor_feature and x86 backend checks enum processor_feature.
They are very easy out of sync and it has happened multiple times in the
past.
1. Move cpuinfo.h from libgcc to common/config/i386 so that we can share
the same enum processor_features in x86 backend and libgcc.
2. Change __cpu_features2 to an array to support more processor features.
3. Add more processor features to enum processor_features.
gcc/
PR target/95259
* common/config/i386/cpuinfo.h: New file.
(__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
(__processor_model2): New.
(CHECK___builtin_cpu_is): New. Defined as empty if not defined.
(has_cpu_feature): New function.
(set_cpu_feature): Likewise.
(get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
CHECK___builtin_cpu_is. Return AMD CPU name.
(get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
Use CHECK___builtin_cpu_is. Return Intel CPU name.
(get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
FEATURE_XSAVEOPT and FEATURE_XSAVES
(cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
Also update cpu_model2.
* common/config/i386/i386-cpuinfo.h (processor_vendor): Add
Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
(processor_features): Moved from gcc/config/i386/i386-builtins.c.
Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
(SIZE_OF_CPU_FEATURES): New.
* config/i386/i386-builtins.c (processor_features): Removed.
(isa_names_table): Replace F_XXX with FEATURE_XXX.
(fold_builtin_cpu): Change __cpu_features2 to an array.
libgcc/
PR target/95259
* config/i386/cpuinfo.c: Don't include "cpuinfo.h". Include
"common/config/i386/i386-cpuinfo.h" and
"common/config/i386/cpuinfo.h".
(__cpu_features2): Changed to array.
(get_amd_cpu): Removed.
(get_intel_cpu): Likewise.
(get_available_features): Likewise.
(__cpu_indicator_init): Call cpu_indicator_init.
* config/i386/cpuinfo.h: Removed.
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In i386-builtins.c, arch_names_table is used to to map architecture name
string to internal model. A switch statement is used to map internal
processor name to architecture name string and internal priority.
model and priority are added to processor_alias_table so that a single
entry contains architecture name string, internal processor name,
internal model and internal priority. 6 entries are appended for
i386-builtins.c, which have special architecture name strings: amd,
amdfam10h, amdfam15h, amdfam17h, shanghai and istanbul, and pta_size is
adjusted to exclude them. Entries which are not used by i386-builtins.c
have internal model 0. P_PROC_DYNAMIC is added to internal priority to
make entries with dynamic architecture name string or priority.
PR target/95842
* common/config/i386/i386-common.c (processor_alias_table): Add
processor model and priority to each entry.
(pta_size): Updated with -6.
(num_arch_names): New.
* common/config/i386/i386-cpuinfo.h: New file.
* config/i386/i386-builtins.c (feature_priority): Removed.
(processor_model): Likewise.
(_arch_names_table): Likewise.
(arch_names_table): Likewise.
(_isa_names_table): Replace P_ZERO with P_NONE.
(get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
processor_alias_table.
(fold_builtin_cpu): Replace arch_names_table with
processor_alias_table.
* config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
(pta): Add model and priority.
(num_arch_names): New.
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After the recent commit that forces uses of c++11, the arm part failed
to build because it does not include <algorithm> via system.h as
should be done.
This results in:
from /gcc/common/config/arm/arm-common.c:34:
/usr/lib/gcc/x86_64-linux-gnu/5/include/mm_malloc.h:42:12: error:
attempt to use poisoned "malloc"
return malloc (size);
This patch fixes the problem by defining INCLUDE_ALGORITHM before
including system.h and no longer includes <algorithm> directly.
gcc/ChangeLog:
* common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
Define. No longer include <algorithm>.
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* common/config/aarch64/aarch64-common.c (aarch64_handle_option):
Handle OPT_moutline_atomics.
* config/aarch64/aarch64.c: Add outline-atomics to
aarch64_attributes.
* doc/extend.texi: Document the newly added target attribute.
* gcc.target/aarch64/target_attr_20.c: New test.
* gcc.target/aarch64/target_attr_21.c: New test.
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- Implied rule are introduced into latest RISC-V ISA spec.
- Only implemented D implied F-extension. Zicsr and Zifence are not
implement yet, so the rule not included in this patch.
- Pass preprocessed arch string to arch.
- Verified with binutils 2.30 and 2.34.
gcc/ChangeLog
* common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
(riscv_implied_info): New.
(riscv_subset_list): Add handle_implied_ext.
(riscv_subset_list::to_string): New parameter version_p to
control output format.
(riscv_subset_list::handle_implied_ext): New.
(riscv_subset_list::parse_std_ext): Call handle_implied_ext.
(riscv_arch_str): New parameter version_p to control output format.
(riscv_expand_arch): New.
* config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
version_p.
* config/riscv/riscv.h (riscv_expand_arch): New,
(EXTRA_SPEC_FUNCTIONS): Define.
(ASM_SPEC): Transform -march= via riscv_expand_arch.
gcc/testsuite/ChangeLog
* gcc.target/riscv/arch-6.c: New.
* gcc.target/riscv/attribute-11.c: New.
* gcc.target/riscv/attribute-12.c: New.
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- The arch string rule has changed in latest spec, it introduced new
multi-letter extension prefix with 'h' and 'z', and drop `sx`. also
adjust parsing order for 's' and 'x'.
gcc/ChangeLog
* riscv-common.c (parse_sv_or_non_std_ext): Rename to
parse_multiletter_ext.
(parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
adjust parsing order for 's' and 'x'.
gcc/testsuite/ChangeLog
* gcc.target/riscv/arch-3.c: Adjust option.
* gcc.target/riscv/arch-5.c: New.
* gcc.target/riscv/attribute-9.c: Adjust option and test
condition.
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gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
* config.gcc: Add tsxldtrkintrin.h to extra_headers.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
TSXLDTRK.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__TSXLDTRK__.
* config/i386/i386-options.c (ix86_target_string): Add
-mtsxldtrk.
(ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
* config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
New.
* config/i386/i386.md (define_c_enum "unspec"): Add
UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
(TSXLDTRK): New define_int_iterator.
("<tsxldtrk>"): New define_insn.
* config/i386/i386.opt: Add -mtsxldtrk.
* config/i386/immintrin.h: Include tsxldtrkintrin.h.
* config/i386/tsxldtrkintrin.h: New.
* doc/invoke.texi: Document -mtsxldtrk.
gcc/testsuite/
* g++.dg/other/i386-2.c: Add -mtsxldtrk.
* g++.dg/other/i386-3.c: Likewise.
* gcc.target/i386/sse-12.c: Likewise.
* gcc.target/i386/sse-13.c: Likewise.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-22.c: Likewsie.
* gcc.target/i386/sse-23.c: Likewise.
* gcc.target/i386/tsxldtrk-1.c: New test.
* gcc.target/i386/funcspec-56.inc: Add target attribute tests
for tsxldtrk.
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2020-03-04 Hongtao Liu <hongtao.liu@intel.com>
2020-03-04 Wei Xiao <wei3.xiao@intel.com>
gcc/Changelog:
* gcc/common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
(ix86_handle_option): Handle -mserialize.
* gcc/config.gcc (serializeintrin.h): New header file.
* gcc/config/i386/cpuid.h (bit_SERIALIZE): New bit.
* gcc/config/i386/driver-i386.c (host_detect_local_cpu): Detect
-mserialize.
* gcc/config/i386/i386-builtin.def: Add new builtin.
* gcc/config/i386/i386-c.c (__SERIALIZE__): New macro.
* gcc/config/i386/i386-options.c (ix86_target_opts_isa2_opts):
Add -mserialize.
* (ix86_valid_target_attribute_inner_p): Add target attribute
* for serialize.
* gcc/config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
New macros.
* gcc/config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
(serialize): New define_insn.
* gcc/config/i386/i386.opt (mserialize): New option
* gcc/config/i386/immintrin.h: Include serailizeintrin.h.
* gcc/config/i386/serializeintrin.h: New header file.
* gcc/doc/invoke.texi: Add documents for -mserialize.
gcc/testsuite/Changelog
* gcc/testsuite/gcc.target/i386/serialize-1.c: New test.
* gcc/testsuite/g++.dg/other/i386-2.C: Add -mserialize.
* gcc/testsuite/g++.dg/other/i386-3.C: Ditto.
* gcc/testsuite/gcc.target/i386/funcspec-56.inc: Ditto.
* gcc/testsuite/gcc.target/i386/sse-12.c: Ditto.
* gcc/testsuite/gcc.target/i386/sse-13.c: Ditto.
* gcc/testsuite/gcc.target/i386/sse-14.c: Ditto.
* gcc/testsuite/gcc.target/i386/sse-22.c: Ditto.
* gcc/testsuite/gcc.target/i386/sse-23.c: Ditto.
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In libgomp offloading testing, this resolves all the 'ld: error: undefined
symbol: __gxx_personality_v0' FAILs.
gcc/
PR target/94282
* common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
function.
(TARGET_EXCEPT_UNWIND_INFO): Define.
libgomp/
PR target/94282
* testsuite/libgomp.c-c++-common/function-not-offloaded.c: Remove
'dg-allow-blank-lines-in-output'.
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Previously -fweb was disabled if only unroll small loops. After that
we find there is cases where it could help to rename pseudos and avoid
some anti-dependence which may occur after unroll.
This patch enables -fweb for small loops unrolling.
2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
* common/config/rs6000/rs6000-common.c
(rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
-fweb.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
set flag_web.
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It is currently impossible to use fp16 on any architecture higher than Armv8.3-a
due to a bug in options canonization. This bug results in the fp16 flag not
being emitted in the assembly when it should have been.
This is caused by a complicated architectural requirement at Armv8.4-a. On
Armv8.2-a and Armv8.3-a fp16fml is an optional extension and turning it on turns
on both fp and fp16. However starting with Armv8.4-a fp16fml is mandatory if
fp16 is available, otherwise it's optional.
In short this means that to enable fp16fml the smallest option that needs to
passed to the assembler is Armv8.4-a+fp16.
The fix in this patch takes into account that an option may be on by default in
an architecture, but that not all the bits required to use it are on by default
in an architecture. In such cases the difference between the two are still
emitted to the assembler.
gcc/ChangeLog:
PR target/94396
* common/config/aarch64/aarch64-common.c
(aarch64_get_extension_string_for_isa_flags): Handle default flags.
gcc/testsuite/ChangeLog:
PR target/94396
* gcc.target/aarch64/options_set_11.c: New test.
* gcc.target/aarch64/options_set_12.c: New test.
* gcc.target/aarch64/options_set_13.c: New test.
* gcc.target/aarch64/options_set_14.c: New test.
* gcc.target/aarch64/options_set_15.c: New test.
* gcc.target/aarch64/options_set_16.c: New test.
* gcc.target/aarch64/options_set_17.c: New test.
* gcc.target/aarch64/options_set_18.c: New test.
* gcc.target/aarch64/options_set_19.c: New test.
* gcc.target/aarch64/options_set_20.c: New test.
* gcc.target/aarch64/options_set_21.c: New test.
* gcc.target/aarch64/options_set_22.c: New test.
* gcc.target/aarch64/options_set_23.c: New test.
* gcc.target/aarch64/options_set_24.c: New test.
* gcc.target/aarch64/options_set_25.c: New test.
* gcc.target/aarch64/options_set_26.c: New test.
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This patch is part of MVE ACLE intrinsics framework.
This patches add support to update (read/write) the APSR (Application Program Status Register)
register and FPSCR (Floating-point Status and Control Register) register for MVE.
This patch also enables thumb2 mov RTL patterns for MVE.
A new feature bit vfp_base is added. This bit is enabled for all VFP, MVE and MVE with floating point
extensions. This bit is used to enable the macro TARGET_VFP_BASE. For all the VFP instructions, RTL patterns,
status and control registers are guarded by TARGET_HAVE_FLOAT. But this patch modifies that and the
common instructions, RTL patterns, status and control registers bewteen MVE and VFP are guarded by
TARGET_VFP_BASE macro.
The RTL pattern set_fpscr and get_fpscr are updated to use VFPCC_REGNUM because few MVE intrinsics
set/get carry bit of FPSCR register.
Please refer to Arm reference manual [1] for more details.
[1] https://developer.arm.com/docs/ddi0553/latest
2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
Mihail Ionescu <mihail.ionescu@arm.com>
Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
feature bit is on and -mfpu=auto is passed as compiler option, do not
generate error on not finding any matching fpu. Because in this case
fpu is not required.
* config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
enabled for MVE and also for all VFP extensions.
(VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
is enabled.
(MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
(MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
along with feature bits mve_float.
(mve): Modify add options in armv8.1-m.main arch for MVE.
(mve.fp): Modify add options in armv8.1-m.main arch for MVE with
floating point.
* config/arm/arm.c (use_return_insn): Replace the
check with TARGET_VFP_BASE.
(thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
TARGET_VFP_BASE.
(arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
well.
(arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
as well.
(arm_compute_frame_layout): Likewise.
(arm_save_coproc_regs): Likewise.
(arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
in MVE as well.
(arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
with equivalent macro TARGET_VFP_BASE.
(arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise.
(arm_conditional_register_usage): Likewise.
(arm_declare_function_name): Add check to skip printing .fpu directive
in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
"softvfp".
* config/arm/arm.h (TARGET_VFP_BASE): Define.
* config/arm/arm.md (arch): Add "mve" to arch.
(eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
(vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
|| TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
* config/arm/constraints.md (Uf): Define to allow modification to FPCCR
in MVE.
* config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
to not allow for MVE.
* config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
enum.
(VUNSPEC_GET_FPSCR): Define.
* config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
instructions which move to general-purpose Register from Floating-point
Special register and vice-versa.
(thumb2_movhi_fp16): Likewise.
(thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
with MCR and MRC instructions which set and get Floating-point Status
and Control Register (FPSCR).
(movdi_vfp): Modify pattern to enable Single-precision scalar float move
in MVE.
(thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
float move patterns in MVE.
(thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
(thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
(push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
TARGET_VFP_BASE check.
(set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
register.
(get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
register.
2020-03-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: New test.
* gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_fpu1.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_fpu2.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_fpu3.c: Likewise.
|
|
PR translation/93830
* common/config/avr/avr-common.c: Remote trailing "|".
|
|
For ARC, predicated instructions are not very friendly with size
optimizations, leading to increased object size. Disable if-conversion
step when optimized for size.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* common/config/arc/arc-common.c (arc_option_optimization_table):
Disable if-conversion step when optimized for size.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
|
|
This option was used to control the short instruction selection. However,
there is no difference in cycles if we use or not a short instruction,
and always someone wants a smaller program.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
R12-R15 are always in ARCOMPACT16_REGS register class.
* config/arc/arc.opt (mq-class): Deprecate.
* config/arc/constraint.md ("q"): Remove dependency on mq-class
option.
* doc/invoke.texi (mq-class): Update text.
* common/config/arc/arc-common.c (arc_option_optimization_table):
Update list.
testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/nps400-1.c: Update test.
|
|
* common/config/avr/avr-common.c (avr_option_optimization_table)
[OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
From-SVN: r280033
|
|
From-SVN: r279813
|
|
WBNOINVD)
PR target/92962
* common/config/i386/i386-common.c (processor_alias_table): Formatting
fixes.
* doc/invoke.texi (bdver3, bdver4, znver1): Add missing closing paren.
(znver2): Likewise. Add RDPID and WBNOINVD, remove spurious comma
before CLWB.
From-SVN: r279455
|
|
x_ix86_isa_flags2.
2019-12-09 Hongtao Liu <hongtao.liu@intel.com>
* gcc/common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX5124FMAPS_SET): Rename to
OPTION_MASK_ISA2_AVX5124FMAPS_SET.
(OPTION_MASK_ISA_AVX5124VNNIW_SET, OPTION_MASK_ISA_AVX512BF16_SET,
OPTION_MASK_ISA_AVX512VP2INTERSECT_SET,
OPTION_MASK_ISA_PCONFIG_SET, OPTION_MASK_ISA_WBNOINVD_SET,
OPTION_MASK_ISA_SGX_SET, OPTION_MASK_ISA_CX16_SET,
OPTION_MASK_ISA_MOVBE_SET, OPTION_MASK_ISA_PTWRITE_SET,
OPTION_MASK_ISA_MWAITX_SET, OPTION_MASK_ISA_CLZERO_SET,
OPTION_MASK_ISA_RDPID_SET, OPTION_MASK_ISA_VAES_SET,
OPTION_MASK_ISA_MOVDIR64B_SET, OPTION_MASK_ISA_WAITPKG_SET,
OPTION_MASK_ISA_CLDEMOTE_SET, OPTION_MASK_ISA_ENQCMD_SET,
OPTION_MASK_ISA_AVX5124FMAPS_UNSET,
OPTION_MASK_ISA_AVX5124VNNIW_UNSET,
OPTION_MASK_ISA_AVX512BF16_UNSET,
OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET,
OPTION_MASK_ISA_PCONFIG_UNSET, OPTION_MASK_ISA_WBNOINVD_UNSET,
OPTION_MASK_ISA_SGX_UNSET, OPTION_MASK_ISA_CX16_UNSET,
OPTION_MASK_ISA_MOVBE_UNSET, OPTION_MASK_ISA_PTWRITE_UNSET,
OPTION_MASK_ISA_MWAITX_UNSET, OPTION_MASK_ISA_CLZERO_UNSET,
OPTION_MASK_ISA_RDPID_UNSET, OPTION_MASK_ISA_VAES_UNSET,
OPTION_MASK_ISA_MOVDIR64B_UNSET, OPTION_MASK_ISA_WAITPKG_UNSET,
OPTION_MASK_ISA_CLDEMOTE_UNSET, OPTION_MASK_ISA_ENQCMD_UNSET,
OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW,
OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT,
OPTION_MASK_ISA_PCONFIG, OPTION_MASK_ISA_WBNOINVD,
OPTION_MASK_ISA_SGX, OPTION_MASK_ISA_CX16, OPTION_MASK_ISA_MOVBE,
OPTION_MASK_ISA_PTWRITE, OPTION_MASK_ISA_MWAITX,
OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_RDPID,
OPTION_MASK_ISA_VAES, OPTION_MASK_ISA_MOVDIR64B,
OPTION_MASK_ISA_WAITPKG, OPTION_MASK_ISA_CLDEMOTE,
OPTION_MASK_ISA_ENQCMD): Ditto.
* gcc/config/i386/i386-builtin.def
(OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW,
OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT,
OPTION_MASK_ISA_WBNOINVD, OPTION_MASK_ISA_PTWRITE,
OPTION_MASK_ISA_RDPID, OPTION_MASK_ISA_VAES,
OPTION_MASK_ISA_MOVDIR64B, OPTION_MASK_ISA_ENQCMD): Ditto.
* gcc/config/i386/i386-builtins.c (OPTION_MASK_ISA_MWAITX,
OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_WAITPKG,
OPTION_MASK_ISA_CLDEMOTE, OPTION_MASK_ISA_WBNOINVD): Ditto.
* gcc/config/i386/i386-c.c
(OPTION_MASK_ISA_AVX5124FMAPS, OPTION_MASK_ISA_AVX5124VNNIW,
OPTION_MASK_ISA_AVX512BF16, OPTION_MASK_ISA_AVX512VP2INTERSECT,
OPTION_MASK_ISA_PCONFIG, OPTION_MASK_ISA_WBNOINVD,
OPTION_MASK_ISA_SGX, OPTION_MASK_ISA_CX16, OPTION_MASK_ISA_MOVBE,
OPTION_MASK_ISA_PTWRITE, OPTION_MASK_ISA_MWAITX,
OPTION_MASK_ISA_CLZERO, OPTION_MASK_ISA_RDPID,
OPTION_MASK_ISA_VAES, OPTION_MASK_ISA_MOVDIR64B,
OPTION_MASK_ISA_WAITPKG, OPTION_MASK_ISA_CLDEMOTE,
OPTION_MASK_ISA_ENQCMD): Ditto.
* gcc/config/i386/i386-option.c: Ditto
* gcc/config/i386/i386.opt: Ditto..
* gcc/config/i386/i386.h: (TARGET_ISA_AVX5124FMAPS,
TARGET_ISA_AVX5124VNNIW, TARGET_ISA_AVX512BF16,
TARGET_ISA_AVX512VP2INTERSECT, TARGET_ISA_PCONFIG,
TARGET_ISA_WBNOINVD, TARGET_ISA_SGX, TARGET_ISA_CX16,
TARGET_ISA_MOVBE, TARGET_ISA_PTWRITE, TARGET_ISA_MWAITX,
TARGET_ISA_CLZERO, TARGET_ISA_RDPID, TARGET_ISA_VAES,
TARGET_ISA_MOVDIR64B, TARGET_ISA_WAITPKG, TARGET_ISA_CLDEMOTE)
TARGET_ISA_ENQCMD): Ditto.
From-SVN: r279116
|
|
I missed this part in r266961. Various people have been editing it
since; I finally noticed.
* common/config/powerpcspe: Delete.
From-SVN: r278361
|
|
2019-11-12 Martin Liska <mliska@suse.cz>
* common/common-target.def: Remove option_validate_param and
option_default_params.
* common/common-targhooks.c (default_option_validate_param):
Remove.
* common/common-targhooks.h (default_option_validate_param):
Remove.
* common/config/aarch64/aarch64-common.c (TARGET_OPTION_DEFAULT_PARAMS):
Remove usage of this.
(TARGET_OPTION_VALIDATE_PARAM): Likewise.
(aarch64_option_validate_param): Likewise.
(aarch64_option_default_params): Likewise
* common/config/bpf/bpf-common.c (bpf_option_default_params): Likewise.
(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
* common/config/ia64/ia64-common.c (ia64_option_default_params): Likewise.
(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
* common/config/powerpcspe/powerpcspe-common.c (rs6000_option_default_params): Likewise.
(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
* common/config/rs6000/rs6000-common.c (rs6000_option_default_params): Likewise.
(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
* common/config/sh/sh-common.c (sh_option_default_params): Likewise.
(TARGET_OPTION_DEFAULT_PARAMS): Likewise.
* config/aarch64/aarch64.c (aarch64_override_options_internal): Validate
guard_size here.
* doc/tm.texi: Remove option_default_params and option_validate_param.
* doc/tm.texi.in: Likewise.
From-SVN: r278090
|
|
2019-11-12 Martin Liska <mliska@suse.cz>
* common/common-target.def:
Do not mention set_default_param_value
and set_param_value.
* doc/tm.texi: Likewise.
From-SVN: r278088
|
|
2019-11-12 Martin Liska <mliska@suse.cz>
* Makefile.in: Remove PARAMS_H and params.list
and params.options.
* params-enum.h: Remove.
* params-list.h: Remove.
* params-options.h: Remove.
* params.c: Remove.
* params.def: Remove.
* params.h: Remove.
* asan.c: Do not include params.h.
* auto-profile.c: Likewise.
* bb-reorder.c: Likewise.
* builtins.c: Likewise.
* cfgcleanup.c: Likewise.
* cfgexpand.c: Likewise.
* cfgloopanal.c: Likewise.
* cgraph.c: Likewise.
* combine.c: Likewise.
* common/config/aarch64/aarch64-common.c: Likewise.
* common/config/gcn/gcn-common.c: Likewise.
* common/config/ia64/ia64-common.c: Likewise.
* common/config/powerpcspe/powerpcspe-common.c: Likewise.
* common/config/rs6000/rs6000-common.c: Likewise.
* common/config/sh/sh-common.c: Likewise.
* config/aarch64/aarch64.c: Likewise.
* config/alpha/alpha.c: Likewise.
* config/arm/arm.c: Likewise.
* config/avr/avr.c: Likewise.
* config/csky/csky.c: Likewise.
* config/i386/i386-builtins.c: Likewise.
* config/i386/i386-expand.c: Likewise.
* config/i386/i386-features.c: Likewise.
* config/i386/i386-options.c: Likewise.
* config/i386/i386.c: Likewise.
* config/ia64/ia64.c: Likewise.
* config/rs6000/rs6000-logue.c: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/s390/s390.c: Likewise.
* config/sparc/sparc.c: Likewise.
* config/visium/visium.c: Likewise.
* coverage.c: Likewise.
* cprop.c: Likewise.
* cse.c: Likewise.
* cselib.c: Likewise.
* dse.c: Likewise.
* emit-rtl.c: Likewise.
* explow.c: Likewise.
* final.c: Likewise.
* fold-const.c: Likewise.
* gcc.c: Likewise.
* gcse.c: Likewise.
* ggc-common.c: Likewise.
* ggc-page.c: Likewise.
* gimple-loop-interchange.cc: Likewise.
* gimple-loop-jam.c: Likewise.
* gimple-loop-versioning.cc: Likewise.
* gimple-ssa-split-paths.c: Likewise.
* gimple-ssa-sprintf.c: Likewise.
* gimple-ssa-store-merging.c: Likewise.
* gimple-ssa-strength-reduction.c: Likewise.
* gimple-ssa-warn-alloca.c: Likewise.
* gimple-ssa-warn-restrict.c: Likewise.
* graphite-isl-ast-to-gimple.c: Likewise.
* graphite-optimize-isl.c: Likewise.
* graphite-scop-detection.c: Likewise.
* graphite-sese-to-poly.c: Likewise.
* graphite.c: Likewise.
* haifa-sched.c: Likewise.
* hsa-gen.c: Likewise.
* ifcvt.c: Likewise.
* ipa-cp.c: Likewise.
* ipa-fnsummary.c: Likewise.
* ipa-inline-analysis.c: Likewise.
* ipa-inline.c: Likewise.
* ipa-polymorphic-call.c: Likewise.
* ipa-profile.c: Likewise.
* ipa-prop.c: Likewise.
* ipa-split.c: Likewise.
* ipa-sra.c: Likewise.
* ira-build.c: Likewise.
* ira-conflicts.c: Likewise.
* loop-doloop.c: Likewise.
* loop-invariant.c: Likewise.
* loop-unroll.c: Likewise.
* lra-assigns.c: Likewise.
* lra-constraints.c: Likewise.
* modulo-sched.c: Likewise.
* opt-suggestions.c: Likewise.
* opts.c: Likewise.
* postreload-gcse.c: Likewise.
* predict.c: Likewise.
* reload.c: Likewise.
* reorg.c: Likewise.
* resource.c: Likewise.
* sanopt.c: Likewise.
* sched-deps.c: Likewise.
* sched-ebb.c: Likewise.
* sched-rgn.c: Likewise.
* sel-sched-ir.c: Likewise.
* sel-sched.c: Likewise.
* shrink-wrap.c: Likewise.
* stmt.c: Likewise.
* targhooks.c: Likewise.
* toplev.c: Likewise.
* tracer.c: Likewise.
* trans-mem.c: Likewise.
* tree-chrec.c: Likewise.
* tree-data-ref.c: Likewise.
* tree-if-conv.c: Likewise.
* tree-inline.c: Likewise.
* tree-loop-distribution.c: Likewise.
* tree-parloops.c: Likewise.
* tree-predcom.c: Likewise.
* tree-profile.c: Likewise.
* tree-scalar-evolution.c: Likewise.
* tree-sra.c: Likewise.
* tree-ssa-ccp.c: Likewise.
* tree-ssa-dom.c: Likewise.
* tree-ssa-dse.c: Likewise.
* tree-ssa-ifcombine.c: Likewise.
* tree-ssa-loop-ch.c: Likewise.
* tree-ssa-loop-im.c: Likewise.
* tree-ssa-loop-ivcanon.c: Likewise.
* tree-ssa-loop-ivopts.c: Likewise.
* tree-ssa-loop-manip.c: Likewise.
* tree-ssa-loop-niter.c: Likewise.
* tree-ssa-loop-prefetch.c: Likewise.
* tree-ssa-loop-unswitch.c: Likewise.
* tree-ssa-math-opts.c: Likewise.
* tree-ssa-phiopt.c: Likewise.
* tree-ssa-pre.c: Likewise.
* tree-ssa-reassoc.c: Likewise.
* tree-ssa-sccvn.c: Likewise.
* tree-ssa-scopedtables.c: Likewise.
* tree-ssa-sink.c: Likewise.
* tree-ssa-strlen.c: Likewise.
* tree-ssa-structalias.c: Likewise.
* tree-ssa-tail-merge.c: Likewise.
* tree-ssa-threadbackward.c: Likewise.
* tree-ssa-threadedge.c: Likewise.
* tree-ssa-uninit.c: Likewise.
* tree-switch-conversion.c: Likewise.
* tree-vect-data-refs.c: Likewise.
* tree-vect-loop.c: Likewise.
* tree-vect-slp.c: Likewise.
* tree-vrp.c: Likewise.
* tree.c: Likewise.
* value-prof.c: Likewise.
* var-tracking.c: Likewise.
2019-11-12 Martin Liska <mliska@suse.cz>
* gimple-parser.c: Do not include params.h.
2019-11-12 Martin Liska <mliska@suse.cz>
* name-lookup.c: Do not include params.h.
* typeck.c: Likewise.
2019-11-12 Martin Liska <mliska@suse.cz>
* lto-common.c: Do not include params.h.
* lto-partition.c: Likewise.
* lto.c: Likewise.
From-SVN: r278086
|
|
2019-11-12 Martin Liska <mliska@suse.cz>
* asan.c (asan_sanitize_stack_p): Replace old parameter syntax
with the new one, include opts.h if needed. Use SET_OPTION_IF_UNSET
macro.
(asan_sanitize_allocas_p): Likewise.
(asan_emit_stack_protection): Likewise.
(asan_protect_global): Likewise.
(instrument_derefs): Likewise.
(instrument_builtin_call): Likewise.
(asan_expand_mark_ifn): Likewise.
* auto-profile.c (auto_profile): Likewise.
* bb-reorder.c (copy_bb_p): Likewise.
(duplicate_computed_gotos): Likewise.
* builtins.c (inline_expand_builtin_string_cmp): Likewise.
* cfgcleanup.c (try_crossjump_to_edge): Likewise.
(try_crossjump_bb): Likewise.
* cfgexpand.c (defer_stack_allocation): Likewise.
(stack_protect_classify_type): Likewise.
(pass_expand::execute): Likewise.
* cfgloopanal.c (expected_loop_iterations_unbounded): Likewise.
(estimate_reg_pressure_cost): Likewise.
* cgraph.c (cgraph_edge::maybe_hot_p): Likewise.
* combine.c (combine_instructions): Likewise.
(record_value_for_reg): Likewise.
* common/config/aarch64/aarch64-common.c (aarch64_option_validate_param): Likewise.
(aarch64_option_default_params): Likewise.
* common/config/ia64/ia64-common.c (ia64_option_default_params): Likewise.
* common/config/powerpcspe/powerpcspe-common.c (rs6000_option_default_params): Likewise.
* common/config/rs6000/rs6000-common.c (rs6000_option_default_params): Likewise.
* common/config/sh/sh-common.c (sh_option_default_params): Likewise.
* config/aarch64/aarch64.c (aarch64_output_probe_stack_range): Likewise.
(aarch64_allocate_and_probe_stack_space): Likewise.
(aarch64_expand_epilogue): Likewise.
(aarch64_override_options_internal): Likewise.
* config/alpha/alpha.c (alpha_option_override): Likewise.
* config/arm/arm.c (arm_option_override): Likewise.
(arm_valid_target_attribute_p): Likewise.
* config/i386/i386-options.c (ix86_option_override_internal): Likewise.
* config/i386/i386.c (get_probe_interval): Likewise.
(ix86_adjust_stack_and_probe_stack_clash): Likewise.
(ix86_max_noce_ifcvt_seq_cost): Likewise.
* config/ia64/ia64.c (ia64_adjust_cost): Likewise.
* config/rs6000/rs6000-logue.c (get_stack_clash_protection_probe_interval): Likewise.
(get_stack_clash_protection_guard_size): Likewise.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
* config/s390/s390.c (allocate_stack_space): Likewise.
(s390_emit_prologue): Likewise.
(s390_option_override_internal): Likewise.
* config/sparc/sparc.c (sparc_option_override): Likewise.
* config/visium/visium.c (visium_option_override): Likewise.
* coverage.c (get_coverage_counts): Likewise.
(coverage_compute_profile_id): Likewise.
(coverage_begin_function): Likewise.
(coverage_end_function): Likewise.
* cse.c (cse_find_path): Likewise.
(cse_extended_basic_block): Likewise.
(cse_main): Likewise.
* cselib.c (cselib_invalidate_mem): Likewise.
* dse.c (dse_step1): Likewise.
* emit-rtl.c (set_new_first_and_last_insn): Likewise.
(get_max_insn_count): Likewise.
(make_debug_insn_raw): Likewise.
(init_emit): Likewise.
* explow.c (compute_stack_clash_protection_loop_data): Likewise.
* final.c (compute_alignments): Likewise.
* fold-const.c (fold_range_test): Likewise.
(fold_truth_andor): Likewise.
(tree_single_nonnegative_warnv_p): Likewise.
(integer_valued_real_single_p): Likewise.
* gcse.c (want_to_gcse_p): Likewise.
(prune_insertions_deletions): Likewise.
(hoist_code): Likewise.
(gcse_or_cprop_is_too_expensive): Likewise.
* ggc-common.c: Likewise.
* ggc-page.c (ggc_collect): Likewise.
* gimple-loop-interchange.cc (MAX_NUM_STMT): Likewise.
(MAX_DATAREFS): Likewise.
(OUTER_STRIDE_RATIO): Likewise.
* gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise.
* gimple-loop-versioning.cc (loop_versioning::max_insns_for_loop): Likewise.
* gimple-ssa-split-paths.c (is_feasible_trace): Likewise.
* gimple-ssa-store-merging.c (imm_store_chain_info::try_coalesce_bswap): Likewise.
(imm_store_chain_info::coalesce_immediate_stores): Likewise.
(imm_store_chain_info::output_merged_store): Likewise.
(pass_store_merging::process_store): Likewise.
* gimple-ssa-strength-reduction.c (find_basis_for_base_expr): Likewise.
* graphite-isl-ast-to-gimple.c (class translate_isl_ast_to_gimple): Likewise.
(scop_to_isl_ast): Likewise.
* graphite-optimize-isl.c (get_schedule_for_node_st): Likewise.
(optimize_isl): Likewise.
* graphite-scop-detection.c (build_scops): Likewise.
* haifa-sched.c (set_modulo_params): Likewise.
(rank_for_schedule): Likewise.
(model_add_to_worklist): Likewise.
(model_promote_insn): Likewise.
(model_choose_insn): Likewise.
(queue_to_ready): Likewise.
(autopref_multipass_dfa_lookahead_guard): Likewise.
(schedule_block): Likewise.
(sched_init): Likewise.
* hsa-gen.c (init_prologue): Likewise.
* ifcvt.c (bb_ok_for_noce_convert_multiple_sets): Likewise.
(cond_move_process_if_block): Likewise.
* ipa-cp.c (ipcp_lattice::add_value): Likewise.
(merge_agg_lats_step): Likewise.
(devirtualization_time_bonus): Likewise.
(hint_time_bonus): Likewise.
(incorporate_penalties): Likewise.
(good_cloning_opportunity_p): Likewise.
(ipcp_propagate_stage): Likewise.
* ipa-fnsummary.c (decompose_param_expr): Likewise.
(set_switch_stmt_execution_predicate): Likewise.
(analyze_function_body): Likewise.
(compute_fn_summary): Likewise.
* ipa-inline-analysis.c (estimate_growth): Likewise.
* ipa-inline.c (caller_growth_limits): Likewise.
(inline_insns_single): Likewise.
(inline_insns_auto): Likewise.
(can_inline_edge_by_limits_p): Likewise.
(want_early_inline_function_p): Likewise.
(big_speedup_p): Likewise.
(want_inline_small_function_p): Likewise.
(want_inline_self_recursive_call_p): Likewise.
(edge_badness): Likewise.
(recursive_inlining): Likewise.
(compute_max_insns): Likewise.
(early_inliner): Likewise.
* ipa-polymorphic-call.c (csftc_abort_walking_p): Likewise.
* ipa-profile.c (ipa_profile): Likewise.
* ipa-prop.c (determine_known_aggregate_parts): Likewise.
(ipa_analyze_node): Likewise.
(ipcp_transform_function): Likewise.
* ipa-split.c (consider_split): Likewise.
* ipa-sra.c (allocate_access): Likewise.
(process_scan_results): Likewise.
(ipa_sra_summarize_function): Likewise.
(pull_accesses_from_callee): Likewise.
* ira-build.c (loop_compare_func): Likewise.
(mark_loops_for_removal): Likewise.
* ira-conflicts.c (build_conflict_bit_table): Likewise.
* loop-doloop.c (doloop_optimize): Likewise.
* loop-invariant.c (gain_for_invariant): Likewise.
(move_loop_invariants): Likewise.
* loop-unroll.c (decide_unroll_constant_iterations): Likewise.
(decide_unroll_runtime_iterations): Likewise.
(decide_unroll_stupid): Likewise.
(expand_var_during_unrolling): Likewise.
* lra-assigns.c (spill_for): Likewise.
* lra-constraints.c (EBB_PROBABILITY_CUTOFF): Likewise.
* modulo-sched.c (sms_schedule): Likewise.
(DFA_HISTORY): Likewise.
* opts.c (default_options_optimization): Likewise.
(finish_options): Likewise.
(common_handle_option): Likewise.
* postreload-gcse.c (eliminate_partially_redundant_load): Likewise.
(if): Likewise.
* predict.c (get_hot_bb_threshold): Likewise.
(maybe_hot_count_p): Likewise.
(probably_never_executed): Likewise.
(predictable_edge_p): Likewise.
(predict_loops): Likewise.
(expr_expected_value_1): Likewise.
(tree_predict_by_opcode): Likewise.
(handle_missing_profiles): Likewise.
* reload.c (find_equiv_reg): Likewise.
* reorg.c (redundant_insn): Likewise.
* resource.c (mark_target_live_regs): Likewise.
(incr_ticks_for_insn): Likewise.
* sanopt.c (pass_sanopt::execute): Likewise.
* sched-deps.c (sched_analyze_1): Likewise.
(sched_analyze_2): Likewise.
(sched_analyze_insn): Likewise.
(deps_analyze_insn): Likewise.
* sched-ebb.c (schedule_ebbs): Likewise.
* sched-rgn.c (find_single_block_region): Likewise.
(too_large): Likewise.
(haifa_find_rgns): Likewise.
(extend_rgns): Likewise.
(new_ready): Likewise.
(schedule_region): Likewise.
(sched_rgn_init): Likewise.
* sel-sched-ir.c (make_region_from_loop): Likewise.
* sel-sched-ir.h (MAX_WS): Likewise.
* sel-sched.c (process_pipelined_exprs): Likewise.
(sel_setup_region_sched_flags): Likewise.
* shrink-wrap.c (try_shrink_wrapping): Likewise.
* targhooks.c (default_max_noce_ifcvt_seq_cost): Likewise.
* toplev.c (print_version): Likewise.
(process_options): Likewise.
* tracer.c (tail_duplicate): Likewise.
* trans-mem.c (tm_log_add): Likewise.
* tree-chrec.c (chrec_fold_plus_1): Likewise.
* tree-data-ref.c (split_constant_offset): Likewise.
(compute_all_dependences): Likewise.
* tree-if-conv.c (MAX_PHI_ARG_NUM): Likewise.
* tree-inline.c (remap_gimple_stmt): Likewise.
* tree-loop-distribution.c (MAX_DATAREFS_NUM): Likewise.
* tree-parloops.c (MIN_PER_THREAD): Likewise.
(create_parallel_loop): Likewise.
* tree-predcom.c (determine_unroll_factor): Likewise.
* tree-scalar-evolution.c (instantiate_scev_r): Likewise.
* tree-sra.c (analyze_all_variable_accesses): Likewise.
* tree-ssa-ccp.c (fold_builtin_alloca_with_align): Likewise.
* tree-ssa-dse.c (setup_live_bytes_from_ref): Likewise.
(dse_optimize_redundant_stores): Likewise.
(dse_classify_store): Likewise.
* tree-ssa-ifcombine.c (ifcombine_ifandif): Likewise.
* tree-ssa-loop-ch.c (ch_base::copy_headers): Likewise.
* tree-ssa-loop-im.c (LIM_EXPENSIVE): Likewise.
* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Likewise.
(try_peel_loop): Likewise.
(tree_unroll_loops_completely): Likewise.
* tree-ssa-loop-ivopts.c (avg_loop_niter): Likewise.
(CONSIDER_ALL_CANDIDATES_BOUND): Likewise.
(MAX_CONSIDERED_GROUPS): Likewise.
(ALWAYS_PRUNE_CAND_SET_BOUND): Likewise.
* tree-ssa-loop-manip.c (can_unroll_loop_p): Likewise.
* tree-ssa-loop-niter.c (MAX_ITERATIONS_TO_TRACK): Likewise.
* tree-ssa-loop-prefetch.c (PREFETCH_BLOCK): Likewise.
(L1_CACHE_SIZE_BYTES): Likewise.
(L2_CACHE_SIZE_BYTES): Likewise.
(should_issue_prefetch_p): Likewise.
(schedule_prefetches): Likewise.
(determine_unroll_factor): Likewise.
(volume_of_references): Likewise.
(add_subscript_strides): Likewise.
(self_reuse_distance): Likewise.
(mem_ref_count_reasonable_p): Likewise.
(insn_to_prefetch_ratio_too_small_p): Likewise.
(loop_prefetch_arrays): Likewise.
(tree_ssa_prefetch_arrays): Likewise.
* tree-ssa-loop-unswitch.c (tree_unswitch_single_loop): Likewise.
* tree-ssa-math-opts.c (gimple_expand_builtin_pow): Likewise.
(convert_mult_to_fma): Likewise.
(math_opts_dom_walker::after_dom_children): Likewise.
* tree-ssa-phiopt.c (cond_if_else_store_replacement): Likewise.
(hoist_adjacent_loads): Likewise.
(gate_hoist_loads): Likewise.
* tree-ssa-pre.c (translate_vuse_through_block): Likewise.
(compute_partial_antic_aux): Likewise.
* tree-ssa-reassoc.c (get_reassociation_width): Likewise.
* tree-ssa-sccvn.c (vn_reference_lookup_pieces): Likewise.
(vn_reference_lookup): Likewise.
(do_rpo_vn): Likewise.
* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr): Likewise.
* tree-ssa-sink.c (select_best_block): Likewise.
* tree-ssa-strlen.c (new_stridx): Likewise.
(new_addr_stridx): Likewise.
(get_range_strlen_dynamic): Likewise.
(class ssa_name_limit_t): Likewise.
* tree-ssa-structalias.c (push_fields_onto_fieldstack): Likewise.
(create_variable_info_for_1): Likewise.
(init_alias_vars): Likewise.
* tree-ssa-tail-merge.c (find_clusters_1): Likewise.
(tail_merge_optimize): Likewise.
* tree-ssa-threadbackward.c (thread_jumps::profitable_jump_thread_path): Likewise.
(thread_jumps::fsm_find_control_statement_thread_paths): Likewise.
(thread_jumps::find_jump_threads_backwards): Likewise.
* tree-ssa-threadedge.c (record_temporary_equivalences_from_stmts_at_dest): Likewise.
* tree-ssa-uninit.c (compute_control_dep_chain): Likewise.
* tree-switch-conversion.c (switch_conversion::check_range): Likewise.
(jump_table_cluster::can_be_handled): Likewise.
* tree-switch-conversion.h (jump_table_cluster::case_values_threshold): Likewise.
(SWITCH_CONVERSION_BRANCH_RATIO): Likewise.
(param_switch_conversion_branch_ratio): Likewise.
* tree-vect-data-refs.c (vect_mark_for_runtime_alias_test): Likewise.
(vect_enhance_data_refs_alignment): Likewise.
(vect_prune_runtime_alias_test_list): Likewise.
* tree-vect-loop.c (vect_analyze_loop_costing): Likewise.
(vect_get_datarefs_in_loop): Likewise.
(vect_analyze_loop): Likewise.
* tree-vect-slp.c (vect_slp_bb): Likewise.
* tree-vectorizer.h: Likewise.
* tree-vrp.c (find_switch_asserts): Likewise.
(vrp_prop::check_mem_ref): Likewise.
* tree.c (wide_int_to_tree_1): Likewise.
(cache_integer_cst): Likewise.
* var-tracking.c (EXPR_USE_DEPTH): Likewise.
(reverse_op): Likewise.
(vt_find_locations): Likewise.
2019-11-12 Martin Liska <mliska@suse.cz>
* gimple-parser.c (c_parser_parse_gimple_body): Replace old parameter syntax
with the new one, include opts.h if needed. Use SET_OPTION_IF_UNSET
macro.
2019-11-12 Martin Liska <mliska@suse.cz>
* name-lookup.c (namespace_hints::namespace_hints): Replace old parameter syntax
with the new one, include opts.h if needed. Use SET_OPTION_IF_UNSET
macro.
* typeck.c (comptypes): Likewise.
2019-11-12 Martin Liska <mliska@suse.cz>
* lto-partition.c (lto_balanced_map): Replace old parameter syntax
with the new one, include opts.h if needed. Use SET_OPTION_IF_UNSET
macro.
* lto.c (do_whole_program_analysis): Likewise.
From-SVN: r278085
|
|
In this patch, loop unroll adjust hook is introduced for powerpc. We
can do target related heuristic adjustment in this hook. In this patch,
-funroll-loops is enabled for small loops at O2 and above with an option
-munroll-small-loops to guard the small loops unrolling, and it works
fine with -flto.
gcc/
2019-11-11 Jiufu Guo <guojiufu@linux.ibm.com>
PR tree-optimization/88760
* gcc/config/rs6000/rs6000.opt (-munroll-only-small-loops): New option.
* gcc/common/config/rs6000/rs6000-common.c
(rs6000_option_optimization_table) [OPT_LEVELS_2_PLUS_SPEED_ONLY]:
Turn on -funroll-loops and -munroll-only-small-loops.
[OPT_LEVELS_ALL]: Turn off -fweb and -frename-registers.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Remove
set of PARAM_MAX_UNROLL_TIMES and PARAM_MAX_UNROLLED_INSNS.
Turn off -munroll-only-small-loops for explicit -funroll-loops.
(TARGET_LOOP_UNROLL_ADJUST): Add loop unroll adjust hook.
(rs6000_loop_unroll_adjust): Define it. Use -munroll-only-small-loops.
gcc.testsuite/
2019-11-11 Jiufu Guo <guojiufu@linux.ibm.com>
PR tree-optimization/88760
* gcc.dg/pr59643.c: Update back to r277550.
From-SVN: r278034
|
|
gcc/
Support 64-bit double and 64-bit long double configurations.
PR target/92055
* config.gcc (tm_defines) [avr]: Set from --with-double=,
--with-long-double=.
* config/avr/t-multilib: Remove.
* config/avr/t-avr: Output of genmultilib.awk is now fully
dynamically generated and no more part of the repo.
(HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): New variables.
Pass them down to...
* config/avr/genmultilib.awk: ...here and handle them.
* gcc/config/avr/avr.opt (-mdouble=, avr_double). New option and var.
(-mlong-double=, avr_long_double). New option and var.
* common/config/avr/avr-common.c (opts.h, diagnostic.h): Include.
(TARGET_OPTION_OPTIMIZATION_TABLE) <-mdouble=, -mlong-double=>:
Set default as requested by --with-double=
(TARGET_HANDLE_OPTION): Define to this...
(avr_handle_option): ...new hook worker.
* config/avr/avr.h (DOUBLE_TYPE_SIZE): Define to avr_double.
(LONG_DOUBLE_TYPE_SIZE): Define to avr_long_double.
(avr_double_lib): New proto for spec function.
(EXTRA_SPEC_FUNCTIONS) <double-lib>: Add.
(DRIVER_SELF_SPECS): Call %:double-lib.
* config/avr/avr.c (avr_option_override): Assert
sizeof(long double) >= sizeof(double) for the target.
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
[__HAVE_DOUBLE_MULTILIB__, __HAVE_LONG_DOUBLE_MULTILIB__]
[__HAVE_DOUBLE64__, __HAVE_DOUBLE32__, __DEFAULT_DOUBLE__=]
[__HAVE_LONG_DOUBLE64__, __HAVE_LONG_DOUBLE32__]
[__HAVE_LONG_DOUBLE_IS_DOUBLE__, __DEFAULT_LONG_DOUBLE__=]:
New built-in define depending on --with-double=, --with-long-double=.
* config/avr/driver-avr.c (avr_double_lib): New spec function.
* doc/invoke.tex (AVR Options) <-mdouble=,-mlong-double=>: Doc.
* doc/install.texi (Cross-Compiler-Specific Options)
<--with-double=, --with-long-double=>: Doc.
libgcc/
Support 64-bit double and 64-bit long double configurations.
PR target/92055
* config/avr/t-avr (HOST_LIBGCC2_CFLAGS): Only add -DF=SF if
long double is a 32-bit type.
* config/avr/t-avrlibc: Copy double64 and long-double64
multilib(s) from the vanilla one.
* config/avr/t-copy-libgcc: New Makefile snip.
From-SVN: r277908
|
|
In PR88760, there are a few disscussion about improve or tune unroller for
targets. And we would agree to enable unroller for small loops at O2 first.
And we could see performance improvement(~10%) for below code:
```
subroutine foo (i, i1, block)
integer :: i, i1
integer :: block(9, 9, 9)
block(i:9,1,i1) = block(i:9,1,i1) - 10
end subroutine foo
```
This kind of code occurs a few times in exchange2 benchmark.
Similar C code:
```
for (i = 0; i < n; i++)
arr[i] = arr[i] - 10;
```
On powerpcle, for O2 , enable -funroll-loops and limit
PARAM_MAX_UNROLL_TIMES=2 and PARAM_MAX_UNROLLED_INSNS=20, we can see >2%
overall improvement for SPEC2017.
This patch is only for rs6000 in which we see visible performance improvement.
gcc/
2019-10-25 Jiufu Guo <guojiufu@linux.ibm.com>
PR tree-optimization/88760
* config/rs6000/rs6000-common.c (rs6000_option_optimization_table):
Enable -funroll-loops for -O2 and above.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Set
PARAM_MAX_UNROLL_TIMES to 2 and PARAM_MAX_UNROLLED_INSNS to 20, and
do not turn on web and rngreg implicitly, if the unroller is not
explicitly enabled.
gcc.testsuite/
2019-10-25 Jiufu Guo <guojiufu@linux.ibm.com>
PR tree-optimization/88760
* gcc.target/powerpc/small-loop-unroll.c: New test.
* c-c++-common/tsan/thread_leak2.c: Update test.
* gcc.dg/pr59643.c: Update test.
* gcc.target/powerpc/loop_align.c: Update test.
* gcc.target/powerpc/ppc-fma-1.c: Update test.
* gcc.target/powerpc/ppc-fma-2.c: Update test.
* gcc.target/powerpc/ppc-fma-3.c: Update test.
* gcc.target/powerpc/ppc-fma-4.c: Update test.
* gcc.target/powerpc/pr78604.c: Update test.
From-SVN: r277501
|
|
* config/avr/avr.c (avr_option_override): Remove set of
PARAM_ALLOW_STORE_DATA_RACES.
* common/config/avr/avr-common.c (avr_option_optimization_table)
[OPT_LEVELS_ALL]: Turn on -fallow-store-data-races.
From-SVN: r277115
|
|
So far z15 was identified as arch13. After the machine has been
announced we can now add the real name.
gcc/ChangeLog:
2019-10-10 Andreas Krebbel <krebbel@linux.ibm.com>
* common/config/s390/s390-common.c (PF_ARCH13): Rename to...
(PF_Z15): ... this.
* config.gcc: Add z15 as option for --with-arch and --with-tune
configure switches.
* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Add
error reporting for unsupported builtins.
* config/s390/s390-opts.h (enum processor_type): Rename
PROCESSOR_8561_ARCH13 to PROCESSOR_8561_Z15.
* config/s390/8561.md: Rename arch13 to z15 throughout the file.
* config/s390/driver-native.c (s390_host_detect_local_cpu):
Likewise.
* config/s390/s390-builtins.def: Likewise.
* config/s390/s390.c (processor_table): Add z15 as option and keep arch13 as alternative.
(s390_expand_builtin): Add missing check for unsupported builtins.
(s390_canonicalize_comparison): Rename TARGET_ARCH13 to TARGET_Z15.
(s390_rtx_costs): Likewise.
(s390_get_sched_attrmask): Rename arch13 to z15.
(s390_get_unit_mask): Likewise.
(s390_is_fpd): Likewise.
(s390_is_fxd): Likewise.
* config/s390/s390.h (enum processor_flags): Likewise.
* config/s390/s390.md: Likewise.
* config/s390/vector.md: Likewise.
* config/s390/vx-builtins.md: Likewise.
* config/s390/s390.opt: Add z15 to processor_type value.
From-SVN: r276792
|
|
This patch series introduces a port of GCC to eBPF, which is a virtual
machine that resides in the Linux kernel. Initially intended for
user-level packet capture and filtering, eBPF is nowadays generalized
to serve as a general-purpose infrastructure also for non-networking
purposes.
The binutils support is already upstream. See
https://sourceware.org/ml/binutils/2019-05/msg00306.html.
ChangeLog:
* MAINTAINERS: Add myself as the maintainer of the eBPF port.
Remove myself from Write After Approval section.
* configure.ac: Support for bpf-*-* targets.
* configure: Regenerate.
contrib/ChangeLog:
* config-list.mk (LIST): Disable go in bpf-*-* targets.
gcc/ChangeLog:
* doc/invoke.texi (Option Summary): Cover eBPF.
(eBPF Options): New section.
* doc/extend.texi (BPF Built-in Functions): Likewise.
(BPF Kernel Helpers): Likewise.
* config.gcc: Support for bpf-*-* targets.
* common/config/bpf/bpf-common.c: New file.
* config/bpf/t-bpf: Likewise.
* config/bpf/predicates.md: Likewise.
* config/bpf/constraints.md: Likewise.
* config/bpf/bpf.opt: Likewise.
* config/bpf/bpf.md: Likewise.
* config/bpf/bpf.h: Likewise.
* config/bpf/bpf.c: Likewise.
* config/bpf/bpf-protos.h: Likewise.
* config/bpf/bpf-opts.h: Likewise.
* config/bpf/bpf-helpers.h: Likewise.
* config/bpf/bpf-helpers.def: Likewise.
gcc/testsuite/ChangeLog:
* gcc.dg/builtins-config.h: eBPF doesn't support C99 standard
functions.
* gcc.c-torture/compile/20101217-1.c: Add a function prototype for
printf.
* gcc.c-torture/compile/20000211-1.c: Skip if target bpf-*-*.
* gcc.c-torture/compile/poor.c: Likewise.
* gcc.c-torture/compile/pr25311.c: Likewise.
* gcc.c-torture/compile/pr39928-1.c: Likewise.
* gcc.c-torture/compile/pr70061.c: Likewise.
* gcc.c-torture/compile/920501-7.c: Likewise.
* gcc.c-torture/compile/20000403-1.c: Likewise.
* gcc.c-torture/compile/20001226-1.c: Likewise.
* gcc.c-torture/compile/20030903-1.c: Likewise.
* gcc.c-torture/compile/20031125-1.c: Likewise.
* gcc.c-torture/compile/20040101-1.c: Likewise.
* gcc.c-torture/compile/20040317-2.c: Likewise.
* gcc.c-torture/compile/20040726-1.c: Likewise.
* gcc.c-torture/compile/20051216-1.c: Likewise.
* gcc.c-torture/compile/900313-1.c: Likewise.
* gcc.c-torture/compile/920625-1.c: Likewise.
* gcc.c-torture/compile/930421-1.c: Likewise.
* gcc.c-torture/compile/930623-1.c: Likewise.
* gcc.c-torture/compile/961004-1.c: Likewise.
* gcc.c-torture/compile/980504-1.c: Likewise.
* gcc.c-torture/compile/980816-1.c: Likewise.
* gcc.c-torture/compile/990625-1.c: Likewise.
* gcc.c-torture/compile/DFcmp.c: Likewise.
* gcc.c-torture/compile/HIcmp.c: Likewise.
* gcc.c-torture/compile/HIset.c: Likewise.
* gcc.c-torture/compile/QIcmp.c: Likewise.
* gcc.c-torture/compile/QIset.c: Likewise.
* gcc.c-torture/compile/SFset.c: Likewise.
* gcc.c-torture/compile/SIcmp.c: Likewise.
* gcc.c-torture/compile/SIset.c: Likewise.
* gcc.c-torture/compile/UHIcmp.c: Likewise.
* gcc.c-torture/compile/UQIcmp.c: Likewise.
* gcc.c-torture/compile/USIcmp.c: Likewise.
* gcc.c-torture/compile/consec.c: Likewise.
* gcc.c-torture/compile/limits-fndefn.c: Likewise.
* gcc.c-torture/compile/lll.c: Likewise.
* gcc.c-torture/compile/parms.c: Likewise.
* gcc.c-torture/compile/pass.c: Likewise.
* gcc.c-torture/compile/pp.c: Likewise.
* gcc.c-torture/compile/pr32399.c: Likewise.
* gcc.c-torture/compile/pr34091.c: Likewise.
* gcc.c-torture/compile/pr34688.c: Likewise.
* gcc.c-torture/compile/pr37258.c: Likewise.
* gcc.c-torture/compile/pr37327.c: Likewise.
* gcc.c-torture/compile/pr37381.c: Likewise.
* gcc.c-torture/compile/pr37669-2.c: Likewise.
* gcc.c-torture/compile/pr37669.c: Likewise.
* gcc.c-torture/compile/pr37742-3.c: Likewise.
* gcc.c-torture/compile/pr44063.c: Likewise.
* gcc.c-torture/compile/pr48596.c: Likewise.
* gcc.c-torture/compile/pr51856.c: Likewise.
* gcc.c-torture/compile/pr54428.c: Likewise.
* gcc.c-torture/compile/pr54713-1.c: Likewise.
* gcc.c-torture/compile/pr54713-2.c: Likewise.
* gcc.c-torture/compile/pr54713-3.c: Likewise.
* gcc.c-torture/compile/pr55921.c: Likewise.
* gcc.c-torture/compile/pr70240.c: Likewise.
* gcc.c-torture/compile/pr70355.c: Likewise.
* gcc.c-torture/compile/pr82052.c: Likewise.
* gcc.c-torture/compile/pr83487.c: Likewise.
* gcc.c-torture/compile/pr86122.c: Likewise.
* gcc.c-torture/compile/pret-arg.c: Likewise.
* gcc.c-torture/compile/regs-arg-size.c: Likewise.
* gcc.c-torture/compile/structret.c: Likewise.
* gcc.c-torture/compile/uuarg.c: Likewise.
* gcc.dg/20001009-1.c: Likewise.
* gcc.dg/20020418-1.c: Likewise.
* gcc.dg/20020426-2.c: Likewise.
* gcc.dg/20020430-1.c: Likewise.
* gcc.dg/20040306-1.c: Likewise.
* gcc.dg/20040622-2.c: Likewise.
* gcc.dg/20050603-2.c: Likewise.
* gcc.dg/20050629-1.c: Likewise.
* gcc.dg/20061026.c: Likewise.
* gcc.dg/Warray-bounds-3.c: Likewise.
* gcc.dg/Warray-bounds-30.c: Likewise.
* gcc.dg/Wframe-larger-than-2.c: Likewise.
* gcc.dg/Wframe-larger-than.c: Likewise.
* gcc.dg/Wrestrict-11.c: Likewise.
* gcc.c-torture/compile/20000804-1.c: Likewise.
* lib/target-supports.exp (check_effective_target_trampolines):
Adapt to eBPF.
(check_effective_target_indirect_jumps): Likewise.
(check_effective_target_nonlocal_goto): Likewise.
(check_effective_target_global_constructor): Likewise.
(check_effective_target_return_address): Likewise.
* gcc.target/bpf/bpf.exp: New file.
* gcc.target/bpf/builtin-load.c: Likewise.
* cc.target/bpf/constant-calls.c: Likewise.
* gcc.target/bpf/diag-funargs.c: Likewise.
* gcc.target/bpf/diag-funargs-2.c: Likewise.
* gcc.target/bpf/diag-funargs-3.c: Likewise.
* gcc.target/bpf/diag-indcalls.c: Likewise.
* gcc.target/bpf/helper-bind.c: Likewise.
* gcc.target/bpf/helper-bpf-redirect.c: Likewise.
* gcc.target/bpf/helper-clone-redirect.c: Likewise.
* gcc.target/bpf/helper-csum-diff.c: Likewise.
* gcc.target/bpf/helper-csum-update.c: Likewise.
* gcc.target/bpf/helper-current-task-under-cgroup.c: Likewise.
* gcc.target/bpf/helper-fib-lookup.c: Likewise.
* gcc.target/bpf/helper-get-cgroup-classid.c: Likewise.
* gcc.target/bpf/helper-get-current-cgroup-id.c: Likewise.
* gcc.target/bpf/helper-get-current-comm.c: Likewise.
* gcc.target/bpf/helper-get-current-pid-tgid.c: Likewise.
* gcc.target/bpf/helper-get-current-task.c: Likewise.
* gcc.target/bpf/helper-get-current-uid-gid.c: Likewise.
* gcc.target/bpf/helper-get-hash-recalc.c: Likewise.
* gcc.target/bpf/helper-get-listener-sock.c: Likewise.
* gcc.target/bpf/helper-get-local-storage.c: Likewise.
* gcc.target/bpf/helper-get-numa-node-id.c: Likewise.
* gcc.target/bpf/helper-get-prandom-u32.c: Likewise.
* gcc.target/bpf/helper-get-route-realm.c: Likewise.
* gcc.target/bpf/helper-get-smp-processor-id.c: Likewise.
* gcc.target/bpf/helper-get-socket-cookie.c: Likewise.
* gcc.target/bpf/helper-get-socket-uid.c: Likewise.
* gcc.target/bpf/helper-getsockopt.c: Likewise.
* gcc.target/bpf/helper-get-stack.c: Likewise.
* gcc.target/bpf/helper-get-stackid.c: Likewise.
* gcc.target/bpf/helper-ktime-get-ns.c: Likewise.
* gcc.target/bpf/helper-l3-csum-replace.c: Likewise.
* gcc.target/bpf/helper-l4-csum-replace.c: Likewise.
* gcc.target/bpf/helper-lwt-push-encap.c: Likewise.
* gcc.target/bpf/helper-lwt-seg6-action.c: Likewise.
* gcc.target/bpf/helper-lwt-seg6-adjust-srh.c: Likewise.
* gcc.target/bpf/helper-lwt-seg6-store-bytes.c: Likewise.
* gcc.target/bpf/helper-map-delete-elem.c: Likewise.
* gcc.target/bpf/helper-map-lookup-elem.c: Likewise.
* gcc.target/bpf/helper-map-peek-elem.c: Likewise.
* gcc.target/bpf/helper-map-pop-elem.c: Likewise.
* gcc.target/bpf/helper-map-push-elem.c: Likewise.
* gcc.target/bpf/helper-map-update-elem.c: Likewise.
* gcc.target/bpf/helper-msg-apply-bytes.c: Likewise.
* gcc.target/bpf/helper-msg-cork-bytes.c: Likewise.
* gcc.target/bpf/helper-msg-pop-data.c: Likewise.
* gcc.target/bpf/helper-msg-pull-data.c: Likewise.
* gcc.target/bpf/helper-msg-push-data.c: Likewise.
* gcc.target/bpf/helper-msg-redirect-hash.c: Likewise.
* gcc.target/bpf/helper-msg-redirect-map.c: Likewise.
* gcc.target/bpf/helper-override-return.c: Likewise.
* gcc.target/bpf/helper-perf-event-output.c: Likewise.
* gcc.target/bpf/helper-perf-event-read.c: Likewise.
* gcc.target/bpf/helper-perf-event-read-value.c: Likewise.
* gcc.target/bpf/helper-perf-prog-read-value.c: Likewise.
* gcc.target/bpf/helper-probe-read.c: Likewise.
* gcc.target/bpf/helper-probe-read-str.c: Likewise.
* gcc.target/bpf/helper-probe-write-user.c: Likewise.
* gcc.target/bpf/helper-rc-keydown.c: Likewise.
* gcc.target/bpf/helper-rc-pointer-rel.c: Likewise.
* gcc.target/bpf/helper-rc-repeat.c: Likewise.
* gcc.target/bpf/helper-redirect-map.c: Likewise.
* gcc.target/bpf/helper-set-hash.c: Likewise.
* gcc.target/bpf/helper-set-hash-invalid.c: Likewise.
* gcc.target/bpf/helper-setsockopt.c: Likewise.
* gcc.target/bpf/helper-skb-adjust-room.c: Likewise.
* gcc.target/bpf/helper-skb-cgroup-id.c: Likewise.
* gcc.target/bpf/helper-skb-change-head.c: Likewise.
* gcc.target/bpf/helper-skb-change-proto.c: Likewise.
* gcc.target/bpf/helper-skb-change-tail.c: Likewise.
* gcc.target/bpf/helper-skb-change-type.c: Likewise.
* gcc.target/bpf/helper-skb-ecn-set-ce.c: Likewise.
* gcc.target/bpf/helper-skb-get-tunnel-key.c: Likewise.
* gcc.target/bpf/helper-skb-get-tunnel-opt.c: Likewise.
* gcc.target/bpf/helper-skb-get-xfrm-state.c: Likewise.
* gcc.target/bpf/helper-skb-load-bytes.c: Likewise.
* gcc.target/bpf/helper-skb-load-bytes-relative.c: Likewise.
* gcc.target/bpf/helper-skb-pull-data.c: Likewise.
* gcc.target/bpf/helper-skb-set-tunnel-key.c: Likewise.
* gcc.target/bpf/helper-skb-set-tunnel-opt.c: Likewise.
* gcc.target/bpf/helper-skb-store-bytes.c: Likewise.
* gcc.target/bpf/helper-skb-under-cgroup.c: Likewise.
* gcc.target/bpf/helper-skb-vlan-pop.c: Likewise.
* gcc.target/bpf/helper-skb-vlan-push.c: Likewise.
* gcc.target/bpf/helper-skc-lookup-tcp.c: Likewise.
* gcc.target/bpf/helper-sk-fullsock.c: Likewise.
* gcc.target/bpf/helper-sk-lookup-tcp.c: Likewise.
* gcc.target/bpf/helper-sk-lookup-upd.c: Likewise.
* gcc.target/bpf/helper-sk-redirect-hash.c: Likewise.
* gcc.target/bpf/helper-sk-redirect-map.c: Likewise.
* gcc.target/bpf/helper-sk-release.c: Likewise.
* gcc.target/bpf/helper-sk-select-reuseport.c: Likewise.
* gcc.target/bpf/helper-sk-storage-delete.c: Likewise.
* gcc.target/bpf/helper-sk-storage-get.c: Likewise.
* gcc.target/bpf/helper-sock-hash-update.c: Likewise.
* gcc.target/bpf/helper-sock-map-update.c: Likewise.
* gcc.target/bpf/helper-sock-ops-cb-flags-set.c: Likewise.
* gcc.target/bpf/helper-spin-lock.c: Likewise.
* gcc.target/bpf/helper-spin-unlock.c: Likewise.
* gcc.target/bpf/helper-strtol.c: Likewise.
* gcc.target/bpf/helper-strtoul.c: Likewise.
* gcc.target/bpf/helper-sysctl-get-current-value.c: Likewise.
* gcc.target/bpf/helper-sysctl-get-name.c: Likewise.
* gcc.target/bpf/helper-sysctl-get-new-value.c: Likewise.
* gcc.target/bpf/helper-sysctl-set-new-value.c: Likewise.
* gcc.target/bpf/helper-tail-call.c: Likewise.
* gcc.target/bpf/helper-tcp-check-syncookie.c: Likewise.
* gcc.target/bpf/helper-tcp-sock.c: Likewise.
* gcc.target/bpf/helper-trace-printk.c: Likewise.
* gcc.target/bpf/helper-xdp-adjust-head.c: Likewise.
* gcc.target/bpf/helper-xdp-adjust-meta.c: Likewise.
* gcc.target/bpf/helper-xdp-adjust-tail.c: Likewise.
* gcc.target/bpf/skb-ancestor-cgroup-id.c: Likewise.
* gcc.target/bpf/sync-fetch-and-add.c: Likewise.
libgcc/ChangeLog:
* config.host: Set cpu_type for bpf-*-* targets.
* config/bpf/t-bpf: Likewise.
* config/bpf/crtn.S: Likewise.
* config/bpf/crti.S: New file.
From-SVN: r275506
|
|
From-SVN: r275343
|
|
2019-08-20 Lili Cui <lili.cui@intel.com>
gcc/
* common/config/i386/i386-common.c
(processor_names): Add tigerlake and cooperlake.
(processor_alias_table): Add tigerlake and cooperlake.
* config.gcc: Add -march=tigerlake and cooperlake.
* config/i386/driver-i386.c
(host_detect_local_cpu): Detect tigerlake and cooperlake.
Add "has_avx" to classify processor.
* config/i386/i386-builtins.c (processor_model):
Add M_INTEL_COREI7_TIGERLAKE and M_INTEL_COREI7_COOPERLAKE.
(arch_names_table): Add tigerlake and cooperlake.
(get_builtin_code_for_version) : Handle PROCESSOR_TIGERLAKE and
PROCESSOR_COOPERLAKE.
* config/i386/i386-c.c
(ix86_target_macros_internal): Handle tigerlake and cooperlake.
* config/i386/i386-options.c
(m_TIGERLAKE) : Define.
(m_COOPERLAKE) : Ditto.
(m_CORE_AVX512): Ditto.
(processor_cost_table): Add cascadelake.
(ix86_option_override_internal): Hadle PTA_MOVDIRI, PTA_MOVDIR64B.
* config/i386/i386.h
(ix86_size_cost) : Define TARGET_TIGERLAKE and TARGET_COOPERLAKE.
(processor_type) : Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
(PTA_MOVDIRI): Ditto.
(PTA_MOVDIR64B): Ditto.
(PTA_COOPERLAKE) : Ditto.
(PTA_TIGERLAKE) : Ditto.
(processor_type) : Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
* doc/extend.texi: Add tigerlake and cooperlake.
* doc/invoke.texi: Add tigerlake and cooperlake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.target/i386/mv16.C: Handle new march
libgcc/
* config/i386/cpuinfo.h: Add INTEL_COREI7_TIGERLAKE and
INTEL_COREI7_COOPERLAKE.
From-SVN: r274693
|
|
2019-07-31 Maxim Blinov <maxim.blinov@embecosm.com>
gcc/
* common/config/riscv/riscv-common.c: Check -march string ends
with null.
gcc/testsuite/
* gcc.target/riscv/attribute-10.c: New test.
From-SVN: r273951
|
|
* i386-common.c: Use PROCESSOR_ZNVER2 scheduler for znver2.
* config/i386/znver1.md: Enable patterns for znver2 and add store
variants which use extra AGU unit.
From-SVN: r273731
|
|
Currently the second lower-subreg pass is run right before RA. This
is much too late to be very useful. At least for targets that do not
have RTL patterns for operations on multi-register modes it is a lot
better to split patterns earlier, before combine and all related
passes.
This adds an option -fsplit-wide-types-early that does that, and
enables it by default for rs6000.
PR rtl-optimization/88233
* common.opt (fsplit-wide-types-early): New option.
* common/config/rs6000/rs6000-common.c
(rs6000_option_optimization_table): Add OPT_fsplit_wide_types_early for
OPT_LEVELS_ALL.
* doc/invoke.texi (Optimization Options): Add -fsplit-wide-types-early.
* lower-subreg.c (pass_lower_subreg2::gate): Add test for
flag_split_wide_types_early.
(pass_data_lower_subreg3): New.
(pass_lower_subreg3): New.
(make_pass_lower_subreg3): New.
* passes.def (pass_lower_subreg2): Move after the loop passes.
(pass_lower_subreg3): New, inserted where pass_lower_subreg2 was.
* tree-pass.h (make_pass_lower_subreg2): Move up, to its new place in
the pass pipeline; its previous place is taken by ...
(make_pass_lower_subreg3): ... this.
From-SVN: r273240
|
|
There are two instructions for AVX512_VP2INTERSECT:
VP2INTERSECTD and VP2INTERSECTQ.
gcc/
2019-06-05 Hongtao Liu <hongtao.liu@intel.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512VP2INTERSECT_SET,
OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET): New macros.
(OPTION_MASK_ISA2_AVX512F_UNSET): Add
OPTION_MASK_ISA_AVX512VP2INTERSECT_UNSET.
(ix86_handle_option): Handle -mavx512vp2intersect.
* config/i386/avx512vp2intersectintrin.h: New.
* config/i386/avx512vp2intersectvlintrin.h: New.
* config/i386/cpuid.h (bit_AVX512VP2INTERSECT): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
AVX512VP2INTERSECT.
* config/i386/i386-builtin-types.def: Add new types.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-builtins.c: (enum processor_features): Add
F_AVX512VP2INTERSECT.
(static const _isa_names_table isa_names_table): Ditto.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512VP2INTERSECT__.
* config/i386/i386-expand.c (ix86_expand_builtin): Expand
IX86_BUILTIN_2INTERSECTD512, IX86_BUILTIN_2INTERSECTQ512,
IX86_BUILTIN_2INTERSECTD256, IX86_BUILTIN_2INTERSECTQ256,
IX86_BUILTIN_2INTERSECTD128, IX86_BUILTIN_2INTERSECTQ128.
* config/i386/i386-modes.def (P2QI, P2HI): New modes.
* config/i386/i386-options.c (ix86_target_string): Add
-mavx512vp2intersect.
(ix86_option_override_internal): Handle AVX512VP2INTERSECT.
* config/i386/i386.c (ix86_hard_regno_nregs): Allocate two regs for
P2HImode and P2QImode.
(ix86_hard_regno_mode_ok): Register pair only starts at even hardreg
number for P2QImode and P2HImode.
(ix86_regmode_natural_size): New function.
* config/i386/i386.h (TARGET_AVX512VP2INTERSECT,
TARGET_AVX512VP2INTERSECT_P, PTA_AVX512VP2INTERSECT
REGMODE_NATURAL_SIZE, MASK_PAIR_REGNO_P): New.
* config/i386/i386-protos.h (ix86_regmode_natural_size): Declare
* config/i386/i386.opt: Add -mavx512vp2intersect.
* config/i386/immintrin.h: Include avx512vp2intersectintrin.h and
avx512vp2intersectvlintrin.h.
* config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_VP2INTERSECT.
(define_mode_iterator VI48_AVX512VP2VL): New.
(avx512vp2intersect_2intersect<mode>,
avx512vp2intersect_2intersectv16si): New define_insn patterns.
* config.gcc: Add avx512vp2intersectvlintrin.h and
avx512vp2intersectintrin.h to extra_headers.
* doc/invoke.texi: Document -mavx512vp2intersect.
gcc/testsuite
2019-06-06 Hongtao Liu <hongtao.liu@intel.com>
Olga Makhotina <olga.makhotina@intel.com>
* gcc.target/i386/avx512-check.h: Handle bit_AVX512VP2INTERSECT.
* gcc.target/i386/avx512vp2intersect-2intersect-1a.c: New test.
* gcc.target/i386/avx512vp2intersect-2intersect-1b.c: Likewise.
* gcc.target/i386/avx512vp2intersect-2intersectvl-1a.c: Likewise.
* gcc.target/i386/avx512vp2intersect-2intersectvl-1b.c: Likewise.
* gcc.target/i386/sse-12.c: Add -mavx512vp2intersect.
* gcc.target/i386/sse-13.c: Likewsie.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-22.c: Likewise.
* gcc.target/i386/sse-23.c: Likewise.
* g++.dg/other/i386-2.C: Likewise.
* g++.dg/other/i386-3.C: Likewise.
Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>
Co-Authored-By: Olga Makhotina <olga.makhotina@intel.com>
From-SVN: r272668
|
|
ChangeLog:
2019-06-19 Dimitar Dimitrov <dimitar@dinux.eu>
* configure: Regenerate.
* configure.ac: Add PRU target.
gcc/ChangeLog:
2019-06-19 Dimitar Dimitrov <dimitar@dinux.eu>
* common/config/pru/pru-common.c: New file.
* config.gcc: Add PRU target.
* config/pru/alu-zext.md: New file.
* config/pru/constraints.md: New file.
* config/pru/predicates.md: New file.
* config/pru/pru-opts.h: New file.
* config/pru/pru-passes.c: New file.
* config/pru/pru-pragma.c: New file.
* config/pru/pru-protos.h: New file.
* config/pru/pru.c: New file.
* config/pru/pru.h: New file.
* config/pru/pru.md: New file.
* config/pru/pru.opt: New file.
* config/pru/t-pru: New file.
* doc/extend.texi: Document PRU pragmas.
* doc/invoke.texi: Document PRU-specific options.
* doc/md.texi: Document PRU asm constraints.
From-SVN: r272202
|
|
gcc/ChangeLog
2019-01-23 Xuepeng Guo <xuepeng.guo@intel.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_ENQCMD_SET,
OPTION_MASK_ISA_ENQCMD_UNSET): New macros.
(ix86_handle_option): Handle -menqcmd.
* config.gcc (enqcmdintrin.h): New header file.
* config/i386/cpuid.h (bit_ENQCMD): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle
-menqcmd.
* config/i386/i386-builtin-types.def ((INT, PVOID, PCVOID)): New
function type.
* config/i386/i386-builtin.def (__builtin_ia32_enqcmd,
__builtin_ia32_enqcmds): New builtins.
* config/i386/i386-c.c (__ENQCMD__): New macro.
* config/i386/i386-option.c (ix86_target_string): Add
-menqcmd.
(ix86_valid_target_attribute_inner_p): Likewise.
* config/i386/i386-expand.c
(ix86_expand_builtin): Expand IX86_BUILTIN_ENQCMD and
IX86_BUILTIN_ENQCMDS.
* config/i386/i386.h (TARGET_ENQCMD): New.
* config/i386/i386.md (UNSPECV_ENQCMD, UNSPECV_ENQCMDS): New.
(@enqcmd<enqcmd_sfx>_<mode>): New insn pattern.
(movdir64b_<mode>): Parameterize to enable share expansion code
with ENQCMD in function ix86_expand_builtin.
* config/i386/i386.opt: Add -menqcmd.
* config/i386/immintrin.h: Include enqcmdintrin.h.
* config/i386/enqcmdintrin.h: New intrinsic file.
* doc/invoke.texi: Add -menqcmd.
gcc/testsuite/ChangeLog
2019-01-23 Xuepeng Guo <xuepeng.guo@intel.com>
* gcc.target/i386/enqcmd.c: New test.
* gcc.target/i386/enqcmds.c: Likewise.
* g++.dg/other/i386-2.C: Add -menqcmd.
* g++.dg/other/i386-3.C: Likewise.
* gcc.target/i386/sse-12.c: Likewise.
* gcc.target/i386/sse-13.c: Likewise.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-23.c: Likewise.
From-SVN: r271678
|
|
Commit r271514 missed changing the type of two functions in
aarch64-protos.h. The function definitions had been updated to use
uint64_t while the function declarations had been missed.
They were missed since I only tested the patch on aarch64 where
`unsigned long` is the same as `uint64_t`.
This patch updates these declarations in aarch64-protos.h.
Tested by building an aarch64 cross-compiler on arm-none-linux-gnu (so
that `unsigned long` and `uint64_t` are different and would give error
messages), and bootstrapping on aarch64-none-linux-gnu.
Also manually tested command line options to see that
-march=armv8-a+typo prints out the expected flags while using the new
feature flags does not complain about missing flags.
gcc/ChangeLog:
2019-05-24 Matthew Malcomson <matthew.malcomson@arm.com>
PR target/90588
* common/config/aarch64/aarch64-common.c
(aarch64_rewrite_selected_cpu): Change local temporary variable
type from unsigned long to uint64_t.
* config/aarch64/aarch64-protos.h (aarch64_parse_extension,
aarch64_get_extension_string_for_isa_flags): Change declaration to
match new definition by replacing unsigned long with uint64_t.
From-SVN: r271599
|
|
This patch adds support in the compiler for the architecture feature
flags that binutils will use to enable/disable the new "Future
Architecture Technologies" feature Scalable Vector Extension V2 (SVE2)
announced at Linaro Connect this week.
The "sve2" extension that enables the core sve2 instructions.
This also enables the sve extension, since sve is a requirement of sve2.
Extra optional sve2 features are the bitperm, sm4, aes, and sha3 extensions.
These are all given extra feature flags, "bitperm", "sve2-sm4",
"sve2-aes", and "sve2-sha3" respectively.
The sm4, aes, and sha3 extensions are explicitly marked as sve2
extensions to distinguish them from the corresponding NEON extensions.
When introducing macros to denote these new features we have gone past
what a 32 bit value can represent which means we need to change the type
of those variables working with these feature flags to ensure they use
64 bit quantities.
Tested with bootstrap on aarch64-none-linux-gnu and manually seeing that
-march=armv8-a+typo prints out the expected flags while using the new
feature flags does not complain about a missing flag (until reaching the
assembler).
gcc/ChangeLog:
2019-05-22 Matthew Malcomson <matthew.malcomson@arm.com>
* common/config/aarch64/aarch64-common.c
(struct aarch64_option_extension, struct processor_name_to_arch,
struct arch_to_arch_name, aarch64_parse_extension, opt_ext_cmp,
aarch64_contains_opt,
aarch64_get_extension_string_for_isa_flags): Change type of
variables storing flags to uint64_t.
* config/aarch64/aarch64-option-extensions.def (sve2, sve2-sm4,
sve2-aes, sve2-sha3, bitperm): New optional SVE2 extension flags.
* config/aarch64/aarch64.c (struct processor,
aarch64_parse_arch, aarch64_parse_cpu, aarch64_validate_mcpu,
aarch64_validate_march, aarch64_override_options,
aarch64_option_print, aarch64_handle_attr_isa_flags,
aarch64_declare_function_name, aarch64_start_file): Make flag
variables uint64_t.
* config/aarch64/aarch64.h (AARCH64_FL_SVE2, AARCH64_FL_SVE2_AES,
AARCH64_FL_SVE2_SM4, AARCH64_FL_SVE2_SHA3,
AARCH64_FL_SVE2_BITPERM): New macro feature flags.
* config/aarch64/aarch64.opt (aarch64_isa_flags): Make uint64_t.
* config/aarch64/driver-aarch64.c
(struct aarch64_arch_extension, struct aarch64_core_data,
struct aarch64_arch_driver_info, host_detect_local_cpu): Make
flag variables uint64_t.
* doc/invoke.texi: Add documentation for new arguments.
From-SVN: r271514
|
|
There are 3 instructions for AVX512BF16: VCVTNE2PS2BF16, VCVTNEPS2BF16 and
DPBF16PS instructions, which are Vector Neural Network Instructions
supporting:
- VCVTNE2PS2BF16: Convert Two Packed Single Data to One Packed BF16 Data.
- VCVTNEPS2BF16: Convert Packed Single Data to Packed BF16 Data.
- VDPBF16PS: Dot Product of BF16 Pairs Accumulated into Packed Single Precision.
2019-05-07 Wei Xiao <wei3.xiao@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET
OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New.
(OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET.
(ix86_handle_option): Handle -mavx512bf16.
* config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h
to extra_headers.
* config/i386/avx512bf16vlintrin.h: New.
* config/i386/avx512bf16intrin.h: New.
* config/i386/cpuid.h (bit_AVX512BF16): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16.
* config/i386/i386-builtin-types.def: Add new types.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512BF16__.
* config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16.
(ix86_option_override_internal): Handle BF16.
(ix86_valid_target_attribute_inner_p): Ditto.
* config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto.
* config/i386/i386-builtin.c (enum processor_features): Add
F_AVX512BF16.
(static const _isa_names_table isa_names_table): Ditto.
* config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New.
(PTA_AVX512BF16): Ditto.
* config/i386/i386.opt: Add -mavx512bf16.
* config/i386/immintrin.h: Include avx512bf16intrin.h
and avx512bf16vlintrin.h.
* config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>,
avx512f_cvtneps2bf16_<mode><mask_name>,
avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns.
* config/i386/subst.md (mask_half): Add new subst.
* doc/invoke.texi: Document -mavx512bf16.
2019-05-07 Wei Xiao <wei3.xiao@intel.com>
* gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c: New test.
* gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c: New test.
* gcc.target/i386/avx512bf16-vdpbf16ps-1.c: New test.
* gcc.target/i386/avx512bf16vl-vcvtne2ps2bf16-1.c: New test.
* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: New test.
* gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c: New test.
* gcc.target/i386/builtin_target.c: Handle avx512bf16.
* gcc.target/i386/sse-12.c: Add -mavx512bf16.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
2019-05-07 Hongtao Liu <hongtao.liu@intel.com>
* config/i386/cpuinfo.c (get_available_features): Detect BF16.
* config/i386/cpuinfo.h (enum processor_features): Add
FEATURE_AVX512BF16.
From-SVN: r271006
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translation/89935).
2019-04-05 Martin Liska <mliska@suse.cz>
PR translation/89935
* check-internal-format-escaping.py: Properly detect wrong
apostrophes.
2019-04-05 Martin Liska <mliska@suse.cz>
PR translation/89935
* collect-utils.c (collect_execute): Use %< and %>, or %qs in
order to wrap keywords or arguments.
* collect2.c (main): Likewise.
(scan_prog_file): Likewise.
(scan_libraries): Likewise.
* common/config/riscv/riscv-common.c (riscv_subset_list::parsing_subset_version): Likewise.
(riscv_subset_list::parse_std_ext): Likewise.
* config/aarch64/aarch64.c (aarch64_override_options_internal): Likewise.
* config/arm/arm.c (arm_option_override): Likewise.
* config/cris/cris.c (cris_print_operand): Likewise.
* config/darwin-c.c (darwin_pragma_options): Likewise.
(darwin_pragma_unused): Likewise.
(darwin_pragma_ms_struct): Likewise.
* config/ft32/ft32.c (ft32_print_operand): Likewise.
* config/i386/i386.c (print_reg): Likewise.
(ix86_print_operand): Likewise.
* config/i386/xm-djgpp.h: Likewise.
* config/iq2000/iq2000.c (iq2000_print_operand): Likewise.
* config/m32c/m32c.c (m32c_option_override): Likewise.
* config/msp430/msp430.c (msp430_option_override): Likewise.
* config/nds32/nds32.c (nds32_option_override): Likewise.
* config/nvptx/mkoffload.c (main): Likewise.
* config/rx/rx.c (rx_print_operand): Likewise.
(valid_psw_flag): Likewise.
* config/vms/vms-c.c (vms_pragma_member_alignment): Likewise.
(vms_pragma_nomember_alignment): Likewise.
(vms_pragma_extern_model): Likewise.
* lto-wrapper.c (compile_offload_image): Likewise.
* omp-offload.c (oacc_parse_default_dims): Likewise.
* symtab.c (symtab_node::verify_base): Likewise.
* tlink.c (recompile_files): Likewise.
(start_tweaking): Likewise.
* tree-profile.c (parse_profile_filter): Likewise.
2019-04-05 Martin Liska <mliska@suse.cz>
PR translation/89935
* objc-act.c (objc_add_property_declaration): Use %< and %>, or %qs in
order to wrap keywords or arguments.
(objc_add_synthesize_declaration_for_property): Likewise.
From-SVN: r270163
|
|
This patch enables the command line options and provides the proper
macros for checking.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* common/config/s390/s390-common.c (processor_flags_table): New
entry for arch13.
* config.gcc: Support arch13 with the --with-arch= configure flag.
* config/s390/driver-native.c (s390_host_detect_local_cpu):
* config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH13.
* config/s390/s390.c (s390_get_sched_attrmask)
(s390_get_unit_mask): Add PROCESSOR_ARCH13.
* config/s390/s390.h (enum processor_flags): Add PF_VXE2 and PF_ARCH13.
* config/s390/s390.md (TARGET_CPU_ARCH13, TARGET_CPU_ARCH13_P)
(TARGET_CPU_VXE2, TARGET_CPU_VXE2_P, TARGET_ARCH13)
(TARGET_ARCH13_P, TARGET_VXE2, TARGET_VXE2_P): New macro
definitions.
* config/s390/s390.opt: Support arch13 as processor type in
command line options.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/s390.exp: Run tests in arch13 subdir.
* lib/target-supports.exp (check_effective_target_s390_vxe2): New
runtime check for the vxe2 hardware feature on IBM Z.
From-SVN: r270077
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