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authorRichard Sandiford <richard.sandiford@linaro.org>2017-08-30 15:25:38 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2017-08-30 15:25:38 +0000
commitbd4288c02b487cc8a9afcfa9c21bfe594a78e26d (patch)
tree9d9683180c8d4eb77c41fbb539c214855b182e6f /gcc/lra.c
parent432ebb1dea041cce8322e78cb394d41970387bae (diff)
Add a partial_subreg_p predicate
This patch adds a partial_subreg_p predicate to go alongside paradoxical_subreg_p. Like the paradoxical_subreg_p patch, this one replaces some tests that were based on GET_MODE_SIZE rather than GET_MODE_PRECISION. In each case the change should be a no-op or an improvement. The regcprop.c patch prevents some replacements of the 82-bit RFmode with the 80-bit XFmode on ia64. I don't understand the target details here particularly well, but from the way the modes are described in ia64-modes.def, it isn't valid to assume that an XFmode can carry an RFmode payload. A comparison of the testsuite assembly output for one target per CPU showed no other differences. Some of the places changed here are tracking the widest access mode found for a register. The series tries to standardise on: if (partial_subreg_p (widest_seen, new_mode)) widest_seen = new_mode; rather than: if (paradoxical_subreg_p (new_mode, widest_seen)) widest_seen = new_mode; Either would have been OK. 2017-08-30 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * rtl.h (partial_subreg_p): New function. * caller-save.c (save_call_clobbered_regs): Use it. * calls.c (expand_call): Likewise. * combine.c (combinable_i3pat): Likewise. (simplify_set): Likewise. (make_extraction): Likewise. (make_compound_operation_int): Likewise. (gen_lowpart_or_truncate): Likewise. (force_to_mode): Likewise. (make_field_assignment): Likewise. (reg_truncated_to_mode): Likewise. (record_truncated_value): Likewise. (move_deaths): Likewise. * cse.c (record_jump_cond): Likewise. (cse_insn): Likewise. * cselib.c (cselib_lookup_1): Likewise. * expmed.c (extract_bit_field_using_extv): Likewise. * function.c (assign_parm_setup_reg): Likewise. * ifcvt.c (noce_convert_multiple_sets): Likewise. * ira-build.c (create_insn_allocnos): Likewise. * lra-coalesce.c (merge_pseudos): Likewise. * lra-constraints.c (match_reload): Likewise. (simplify_operand_subreg): Likewise. (curr_insn_transform): Likewise. * lra-lives.c (process_bb_lives): Likewise. * lra.c (new_insn_reg): Likewise. (lra_substitute_pseudo): Likewise. * regcprop.c (mode_change_ok): Likewise. (maybe_mode_change): Likewise. (copyprop_hardreg_forward_1): Likewise. * reload.c (push_reload): Likewise. (find_reloads): Likewise. (find_reloads_subreg_address): Likewise. * reload1.c (alter_reg): Likewise. (eliminate_regs_1): Likewise. * simplify-rtx.c (simplify_unary_operation_1): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251536
Diffstat (limited to 'gcc/lra.c')
-rw-r--r--gcc/lra.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/lra.c b/gcc/lra.c
index affec0c5948..61e40eebe3f 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -546,8 +546,8 @@ new_insn_reg (rtx_insn *insn, int regno, enum op_type type,
lra_insn_reg *ir = lra_insn_reg_pool.allocate ();
ir->type = type;
ir->biggest_mode = mode;
- if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (lra_reg_info[regno].biggest_mode)
- && NONDEBUG_INSN_P (insn))
+ if (NONDEBUG_INSN_P (insn)
+ && partial_subreg_p (lra_reg_info[regno].biggest_mode, mode))
lra_reg_info[regno].biggest_mode = mode;
ir->subreg_p = subreg_p;
ir->early_clobber = early_clobber;
@@ -1913,7 +1913,7 @@ lra_substitute_pseudo (rtx *loc, int old_regno, rtx new_reg, bool subreg_p)
if (mode != inner_mode
&& ! (CONST_INT_P (new_reg) && SCALAR_INT_MODE_P (mode)))
{
- if (GET_MODE_SIZE (mode) >= GET_MODE_SIZE (inner_mode)
+ if (!partial_subreg_p (mode, inner_mode)
|| ! SCALAR_INT_MODE_P (inner_mode))
new_reg = gen_rtx_SUBREG (mode, new_reg, 0);
else