summaryrefslogtreecommitdiff
path: root/gcc/doc
diff options
context:
space:
mode:
authorKelvin Nilsen <kelvin@gcc.gnu.org>2020-05-11 11:41:23 -0500
committerBill Schmidt <wschmidt@linux.ibm.com>2020-05-11 11:41:23 -0500
commited07d68141f88ba05189b748ea8935baca9b16b1 (patch)
tree61d4fa9ddd04d2a32a8379c46eeee7a7bac508a7 /gcc/doc
parent2403d3d7a5e4878f211d868fd4b76a4b70ce2a54 (diff)
rs6000: Add vcfuged instruction
Add the new vector centrifuge-doubleword instruction and built-in function access. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.h (vec_cfuge): New #define. * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant. (vcfuged): New insn. * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged): New built-in function. * config/rs6000/rs6000-call.c (builtin_function_type): Add handling for FUTURE_BUILTIN_VCFUGED case. * doc/extend.texi (PowerPC AltiVec Built-in Functions Available for a Future Architecture): Add description of vec_cfuge built-in function. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/vec-cfuged-0.c: New test. * gcc.target/powerpc/vec-cfuged-1.c: New test.
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/extend.texi9
1 files changed, 9 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 8b5a51a6973..f7b30c7ead7 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -20719,6 +20719,15 @@ PowerPC family of processors, starting with a hypothetical CPU
which may or may not be available in the future
(@option{-mcpu=future}) or later:
+
+@smallexample
+@exdent vector unsigned long long int
+@exdent vec_cfuge (vector unsigned long long int, vector unsigned long long int)
+@end smallexample
+Perform a vector centrifuge operation, as if implemented by the Future
+@code{vcfuged} instruction.
+@findex vec_cfuge
+
@smallexample
@exdent vector unsigned long long int
@exdent vec_clzm (vector unsigned long long int, vector unsigned long long int)