diff options
author | Kelvin Nilsen <kelvin@gcc.gnu.org> | 2020-05-13 16:09:17 -0500 |
---|---|---|
committer | Bill Schmidt <wschmidt@linux.ibm.com> | 2020-05-13 16:09:17 -0500 |
commit | c21d2b6661c82a455be551d55e4e17005b480ad3 (patch) | |
tree | be7e0fdb6fcd498b979b5959df7d40f86a560296 /gcc/doc | |
parent | 4924293a62ee797310dd448e545118afd5aebb3f (diff) |
rs6000: Add vec_extracth and vec_extractl
Add new insns vextdu[bhw]vlx, vextddvlx, vextdu[bhw]vhx, and
vextddvhx, along with built-in access and overloaded built-in
access to these insns.
[gcc]
2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/altivec.h (vec_extractl): New #define.
(vec_extracth): Likewise.
* config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
(UNSPEC_EXTRACTR): Likewise.
(vextractl<mode>): New expansion.
(vextractl<mode>_internal): New insn.
(vextractr<mode>): New expansion.
(vextractr<mode>_internal): New insn.
* config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
New built-in function.
(__builtin_altivec_vextduhvlx): Likewise.
(__builtin_altivec_vextduwvlx): Likewise.
(__builtin_altivec_vextddvlx): Likewise.
(__builtin_altivec_vextdubvhx): Likewise.
(__builtin_altivec_vextduhvhx): Likewise.
(__builtin_altivec_vextduwvhx): Likewise.
(__builtin_altivec_vextddvhx): Likewise.
(__builtin_vec_extractl): New overloaded built-in function.
(__builtin_vec_extracth): Likewise.
* config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
Define overloaded forms of __builtin_vec_extractl and
__builtin_vec_extracth.
(builtin_function_type): Add cases to mark arguments of new
built-in functions as unsigned.
(rs6000_common_init_builtins): Add
opaque_ftype_opaque_opaque_opaque_opaque.
* config/rs6000/rs6000.md (du_or_d): New mode attribute.
* doc/extend.texi (PowerPC AltiVec Built-in Functions Available
for a Future Architecture): Add description of vec_extractl and
vec_extractr built-in functions.
[gcc/testsuite]
2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/vec-extracth-0.c: New.
* gcc.target/powerpc/vec-extracth-1.c: New.
* gcc.target/powerpc/vec-extracth-2.c: New.
* gcc.target/powerpc/vec-extracth-3.c: New.
* gcc.target/powerpc/vec-extracth-4.c: New.
* gcc.target/powerpc/vec-extracth-5.c: New.
* gcc.target/powerpc/vec-extracth-6.c: New.
* gcc.target/powerpc/vec-extracth-7.c: New.
* gcc.target/powerpc/vec-extracth-be-0.c: New.
* gcc.target/powerpc/vec-extracth-be-1.c: New.
* gcc.target/powerpc/vec-extracth-be-2.c: New.
* gcc.target/powerpc/vec-extracth-be-3.c: New.
* gcc.target/powerpc/vec-extractl-0.c: New.
* gcc.target/powerpc/vec-extractl-1.c: New.
* gcc.target/powerpc/vec-extractl-2.c: New.
* gcc.target/powerpc/vec-extractl-3.c: New.
* gcc.target/powerpc/vec-extractl-4.c: New.
* gcc.target/powerpc/vec-extractl-5.c: New.
* gcc.target/powerpc/vec-extractl-6.c: New.
* gcc.target/powerpc/vec-extractl-7.c: New.
* gcc.target/powerpc/vec-extractl-be-0.c: New.
* gcc.target/powerpc/vec-extractl-be-1.c: New.
* gcc.target/powerpc/vec-extractl-be-2.c: New.
* gcc.target/powerpc/vec-extractl-be-3.c: New.
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/extend.texi | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 1c275ff1d2c..c80848e9061 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -20901,6 +20901,62 @@ integer value between 2 and 7 inclusive. @smallexample @exdent vector unsigned long long int +@exdent vec_extractl (vector unsigned char, vector unsigned char, unsigned int) +@exdent vector unsigned long long int +@exdent vec_extractl (vector unsigned short, vector unsigned short, unsigned int) +@exdent vector unsigned long long int +@exdent vec_extractl (vector unsigned int, vector unsigned int, unsigned int) +@exdent vector unsigned long long int +@exdent vec_extractl (vector unsigned long long, vector unsigned long long, unsigned int) +@end smallexample +Extract a single element from the vector formed by catenating this function's +first two arguments at the byte offset specified by this function's +third argument. On big-endian targets, this function behaves as if +implemented by the Future @code{vextdubvlx}, @code{vextduhvlx}, +@code{vextduwvlx}, or @code{vextddvlx} instructions, depending on the +types of the function's first two arguments. On little-endian +targets, this function behaves as if implemented by the Future +@code{vextdubvrx}, @code{vextduhvrx}, +@code{vextduwvrx}, or @code{vextddvrx} instructions. +The byte offset of the element to be extracted is calculated +by computing the remainder of dividing the third argument by 32. +If this reminader value is not a multiple of the vector element size, +or if its value added to the vector element size exceeds 32, the +result is undefined. +@findex vec_extractl + +@smallexample +@exdent vector unsigned long long int +@exdent vec_extractr (vector unsigned char, vector unsigned char, unsigned int) +@exdent vector unsigned long long int +@exdent vec_extractr (vector unsigned short, vector unsigned short, unsigned int) +@exdent vector unsigned long long int +@exdent vec_extractr (vector unsigned int, vector unsigned int, unsigned int) +@exdent vector unsigned long long int +@exdent vec_extractr (vector unsigned long long, vector unsigned long long, unsigned int) +@end smallexample +Extract a single element from the vector formed by catenating this function's +first two arguments at the byte offset calculated by subtracting this +function's third argument from 31. On big-endian targets, this +function behaves as if +implemented by the Future +@code{vextdubvrx}, @code{vextduhvrx}, +@code{vextduwvrx}, or @code{vextddvrx} instructions, depending on the +types of the function's first two arguments. +On little-endian +targets, this function behaves as if implemented by the Future +@code{vextdubvlx}, @code{vextduhvlx}, +@code{vextduwvlx}, or @code{vextddvlx} instructions. +The byte offset of the element to be extracted, measured from the +right end of the catenation of the two vector arguments, is calculated +by computing the remainder of dividing the third argument by 32. +If this reminader value is not a multiple of the vector element size, +or if its value added to the vector element size exceeds 32, the +result is undefined. +@findex vec_extractr + +@smallexample +@exdent vector unsigned long long int @exdent vec_pdep (vector unsigned long long int, vector unsigned long long int) @end smallexample Perform a vector parallel bits deposit operation, as if implemented by |