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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2020-04-28 16:21:31 +0100
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>2020-04-28 16:22:15 +0100
commit0e8e1a6d97cc44d47992e40198490f780fbbfd5a (patch)
tree4e2574012af22c952e2a1cde880b64504570024b /gcc/doc
parenta5bff8af0a68d039e1586087639c86d6931c9b81 (diff)
[arm] Remove +nofp from -mcpu=cortex-m55 options
Turns out for consistency with LLVM the +nofp option shouldn't remove ALL of FP and MVE, just the FP part of MVE. This requires more surgery with feature bits so for GCC 10 I'd rather just not support +nofp for -mcpu=cortex-m55 and implement it properly for GCC 11. 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option. * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
Diffstat (limited to 'gcc/doc')
-rw-r--r--gcc/doc/invoke.texi2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 04b84e3a10e..fed38e88ae5 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -18841,7 +18841,7 @@ Disables the floating-point and SIMD instructions on
@samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12},
@samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a15.cortex-a7},
@samp{cortex-a17.cortex-a7}, @samp{cortex-a32}, @samp{cortex-a35},
-@samp{cortex-a53},@samp{cortex-a55} and @samp{cortex-m55}.
+@samp{cortex-a53} and @samp{cortex-a55}.
@item +nofp.dp
Disables the double-precision component of the floating-point instructions