diff options
| author | Uros Bizjak <ubizjak@gmail.com> | 2020-05-14 13:47:33 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2020-05-14 13:47:33 +0200 |
| commit | 365e3cde4978c6a7dbfa50865720226254c016be (patch) | |
| tree | 14752db76d0680b55bbda53a957b13b353e558f8 /gcc/config | |
| parent | 2c814af65ef9f146519cba657890a4fd93c5be38 (diff) | |
i386: Add V2DFmode conversion functions [PR95046]
gcc/ChangeLog:
PR target/95046
* config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
(floatv2siv2df2): New expander.
(floatunsv2siv2df2): New insn pattern.
(fix_truncv2dfv2si2): New expander.
(fixuns_truncv2dfv2si2): New insn pattern.
testsuite/ChangeLog:
PR target/95046
* gcc.target/i386/pr95046-6.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/sse.md | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7a7ecd4be87..dc0ecbc182e 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -5532,8 +5532,8 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (define_insn "sse2_cvtpi2pd" - [(set (match_operand:V2DF 0 "register_operand" "=v,x") - (float:V2DF (match_operand:V2SI 1 "nonimmediate_operand" "vBm,?!y")))] + [(set (match_operand:V2DF 0 "register_operand" "=v,?!x") + (float:V2DF (match_operand:V2SI 1 "nonimmediate_operand" "vBm,yBm")))] "TARGET_SSE2" "@ %vcvtdq2pd\t{%1, %0|%0, %1} @@ -5545,6 +5545,21 @@ (set_attr "prefix" "maybe_vex,*") (set_attr "mode" "V2DF")]) +(define_expand "floatv2siv2df2" + [(set (match_operand:V2DF 0 "register_operand") + (float:V2DF (match_operand:V2SI 1 "nonimmediate_operand")))] + "TARGET_MMX_WITH_SSE") + +(define_insn "floatunsv2siv2df2" + [(set (match_operand:V2DF 0 "register_operand" "=v") + (unsigned_float:V2DF + (match_operand:V2SI 1 "nonimmediate_operand" "vm")))] + "TARGET_MMX_WITH_SSE && TARGET_AVX512VL" + "vcvtudq2pd\t{%1, %0|%0, %1}" + [(set_attr "type" "ssecvt") + (set_attr "prefix" "evex") + (set_attr "mode" "V2DF")]) + (define_insn "sse2_cvtpd2pi" [(set (match_operand:V2SI 0 "register_operand" "=v,?!y") (unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm,xBm")] @@ -5580,6 +5595,21 @@ (set_attr "prefix" "maybe_vex,*") (set_attr "mode" "TI")]) +(define_expand "fix_truncv2dfv2si2" + [(set (match_operand:V2SI 0 "register_operand") + (fix:V2SI (match_operand:V2DF 1 "vector_operand")))] + "TARGET_MMX_WITH_SSE") + +(define_insn "fixuns_truncv2dfv2si2" + [(set (match_operand:V2SI 0 "register_operand" "=v") + (unsigned_fix:V2SI + (match_operand:V2DF 1 "nonimmediate_operand" "vm")))] + "TARGET_MMX_WITH_SSE && TARGET_AVX512VL" + "vcvttpd2udq{x}\t{%1, %0|%0, %1}" + [(set_attr "type" "ssecvt") + (set_attr "prefix" "evex") + (set_attr "mode" "TI")]) + (define_insn "sse2_cvtsi2sd" [(set (match_operand:V2DF 0 "register_operand" "=x,x,v") (vec_merge:V2DF |