ampere-computing/binutils-gdb.git - Binutils/GDB including Ampere Computing toolchain specific patches

Age	Commit message (Expand)	Author
2018-01-04	RISC-V: Add 2 missing privileged registers.	Jim Wilson
2018-01-03	Update year range in copyright notice of binutils files	Alan Modra
2017-12-28	RISC-V: Add missing privileged spec registers.	Jim Wilson
2017-12-19	Correct disassembly of dot product instructions.	Tamar Christina
2017-12-19	Add support for V_4B so we can properly reject it.	Tamar Christina
2017-12-01	Use consistent types for holding instructions, instruction masks, etc.	Peter Bergner
2017-11-16	Add new AArch64 FP16 FM{A\|S} instructions.	Tamar Christina
2017-11-15	Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a int...	Tamar Christina
2017-11-09	Enable the Dot Product extension by default for Armv8.4-a.	Tamar Christina
2017-11-09	Adds the new Fields and Operand types for the new instructions in Armv8.4-a.	Tamar Christina
2017-11-09	Split the ARM Crypto ISA extensions for AES and SHA1+2 into their own options...	Tamar Christina
2017-11-09	Change the type of the aarch64_feature_set typedef to unsigned long long so t...	Nick Clifton
2017-11-08	Split the AArch64 Crypto instructions for AES and SHA1+2 into their own optio...	Nick Clifton
2017-11-08	Adds command line support for Armv8.4-A, via the new command line option -mar...	Jiong Wang
2017-11-07	RISC-V: Add satp as an alias for sptbr	Palmer Dabbelt
2017-11-07	This patch similarly to the AArch64 one enables Dot Product support by defaul...	Tamar Christina
2017-11-02	aarch64: Remove AARCH64_FEATURE_F16 from AARCH64_ARCH_V8_2	Siddhesh Poyarekar
2017-10-25	PR22348, conflicting global vars in crx and cr16	Alan Modra
2017-10-24	RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2	Andrew Waterman
2017-10-12	FT32: support for FT32B processor - part 1	James Bowman
2017-09-11	nds32: Rename __BIT() to N32_BIT().	Kuan-Lin Chen
2017-08-24	[PowerPC VLE] Add SPE2 and EFS2 instructions support	Alexander Fedotov
2017-08-21	[PowerPC VLE] Add LSP (Lightweight Signal Processing) instruction support	Alexander Fedotov
2017-07-19	[ARC] Add SJLI instruction.	Claudiu Zissulescu
2017-07-19	[ARC] Add JLI support.	John Eric Martin
2017-07-18	Fix spelling typos.	Yuri Chornovian
2017-06-30	Add support for a __gcc_isr pseudo isntruction to the AVR assembler.	Georg-Johann Lay
2017-06-30	MIPS: Fix XPA base and Virtualization ASE instruction handling	Maciej W. Rozycki
2017-06-28	[AArch64] Add dot product support for AArch64 to binutils	Tamar Christina
2017-06-28	[ARM] Assembler and disassembler support Dot Product Extension	Jiong Wang
2017-06-28	MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support	Maciej W. Rozycki
2017-06-24	[ARM] Add support for ARMv8-R in assembler and readelf	Thomas Preud'homme
2017-06-24	[ARM] Remove ARMv6S-M special casing	Thomas Preud'homme
2017-06-21	[ARM] Rework Tag_CPU_arch build attribute value selection	Thomas Preud'homme
2017-05-30	S/390: Improve error checking for optional operands	Andreas Krebbel
2017-05-30	S/390: Remove optional operand flag.	Andreas Krebbel
2017-05-23	[ARC] Update MAX_INSN_FLGS.	claziss
2017-05-22	x86: Add NOTRACK prefix support	H.J. Lu
2017-05-19	binutils: support for the SPARC M8 processor	Jose E. Marchesi
2017-05-15	MIPS16e2: Add MIPS16e2 ASE support	Maciej W. Rozycki
2017-05-14	Fix match and mask for 64-bit bb opcode.	John David Anglin
2017-05-10	[ARC] Object attributes.	Claudiu Zissulescu
2017-04-11	Reorder PPC_OPCODE_* and set PPC_OPCODE_TMR for e6500	Alan Modra
2017-04-11	Bye bye PPC_OPCODE_HTM and -mhtm	Alan Modra
2017-04-11	Bye Bye PPC_OPCODE_VSX3	Alan Modra
2017-04-11	Bye bye PPC_OPCODE_ALTIVEC2	Alan Modra
2017-03-31	RISC-V: Add physical memory protection CSRs	Andrew Waterman
2017-03-30	Add support for the WebAssembly file format and the wasm32 ELF conversion to ...	Pip Cet
2017-03-29	PowerPC -Mraw disassembly	Alan Modra
2017-03-27	Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.	Rinat Zelig