| Age | Commit message (Collapse) | Author |
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Binutils is supposed to use tabs. In my git config I have
whitespace = indent-with-non-tab,space-before-tab,trailing-space
and I got annoyed enough seeing red in "git diff" output to fix
the problems.
* doc/header.sed: Trim trailing space when splitting lines.
* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c,
* aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h,
* arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c,
* archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c,
* bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c,
* coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c,
* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c,
* coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
* coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
* coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c,
* cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c,
* cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c,
* cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c,
* cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c,
* cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c,
* cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c,
* cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c,
* ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c,
* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c,
* elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c,
* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h,
* elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c,
* elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c,
* elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c,
* elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c,
* elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c,
* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c,
* elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c,
* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c,
* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h,
* elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c,
* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c,
* elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c,
* elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c,
* elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
* elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h,
* elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
* elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c,
* elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c,
* host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c,
* i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c,
* i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h,
* libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h,
* libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c,
* m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c,
* mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c,
* mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h,
* netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c,
* nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c,
* opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c,
* pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c,
* pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c,
* peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c,
* riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h,
* sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c,
* syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c,
* vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c,
* vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c,
* xsym.c, * xsym.h: Whitespace fixes.
* bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.
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Since elf_link_add_object_symbols sets non_ir_ref_regular now, there is
no need to set non_ir_ref_regular in check_relocs.
Tested on i686 and x86-64.
* elf-m10300.c (mn10300_elf_check_relocs): Don't set
non_ir_ref_regular.
* elf32-arm.c (elf32_arm_check_relocs): Likewise.
* elf32-bfin.c (bfin_check_relocs): Likewise.
* elf32-cr16.c (cr16_elf_check_relocs): Likewise.
* elf32-cris.c (cris_elf_check_relocs): Likewise.
* elf32-d10v.c (elf32_d10v_check_relocs): Likewise.
* elf32-dlx.c (elf32_dlx_check_relocs): Likewise.
* elf32-fr30.c (fr30_elf_check_relocs): Likewise.
* elf32-frv.c (elf32_frv_check_relocs): Likewise.
* elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
* elf32-i370.c (i370_elf_check_relocs): Likewise.
* elf32-i386.c (elf_i386_check_relocs): Likewise.
* elf32-iq2000.c (iq2000_elf_check_relocs): Likewise.
* elf32-lm32.c (lm32_elf_check_relocs): Likewise.
* elf32-m32c.c (m32c_elf_check_relocs): Likewise.
* elf32-m32r.c (m32r_elf_check_relocs): Likewise.
* elf32-m68hc1x.c (elf32_m68hc11_check_relocs): Likewise.
* elf32-m68k.c (elf_m68k_check_relocs): Likewise.
* elf32-mcore.c (mcore_elf_check_relocs): Likewise.
* elf32-metag.c (elf_metag_check_relocs): Likewise.
* elf32-microblaze.c (microblaze_elf_check_relocs): Likewise.
* elf32-moxie.c (moxie_elf_check_relocs): Likewise.
* elf32-msp430.c (elf32_msp430_check_relocs): Likewise.
* elf32-mt.c (mt_elf_check_relocs): Likewise.
* elf32-nios2.c (nios2_elf32_check_relocs): Likewise.
* elf32-or1k.c (or1k_elf_check_relocs): Likewise.
* elf32-ppc.c (ppc_elf_check_relocs): Likewise.
* elf32-rl78.c (rl78_elf_check_relocs): Likewise.
* elf32-s390.c (elf_s390_check_relocs): Likewise.
* elf32-score.c (s3_bfd_score_elf_check_relocs): Likewise.
* elf32-score7.c (s7_bfd_score_elf_check_relocs): Likewise.
* elf32-sh.c (sh_elf_check_relocs): Likewise.
* elf32-tic6x.c (elf32_tic6x_check_relocs): Likewise.
* elf32-tilepro.c (tilepro_elf_check_relocs): Likewise.
* elf32-v850.c (v850_elf_check_relocs): Likewise.
* elf32-vax.c (elf_vax_check_relocs): Likewise.
* elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
* elf32-xtensa.c (elf_xtensa_check_relocs): Likewise.
* elf64-aarch64.c (elf64_aarch64_check_relocs): Likewise.
* elf64-alpha.c (elf64_alpha_check_relocs): Likewise.
* elf64-hppa.c (elf64_hppa_check_relocs): Likewise.
* elf64-ia64-vms.c (elf64_ia64_check_relocs): Likewise.
* elf64-mmix.c (mmix_elf_check_relocs): Likewise.
* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
* elf64-s390.c (elf_s390_check_relocs): Likewise.
* elf64-sh64.c (sh_elf64_check_relocs): Likewise.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Likewise.
* elfnn-ia64.c (elfNN_ia64_check_relocs): Likewise.
* elfnn-riscv.c (riscv_elf_check_relocs): Likewise.
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
* elfxx-tilegx.c (tilegx_elf_check_relocs): Likewise.
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This makes the elf_link_hash_entry weakdef field, currently used to
point from a weak symbol to a strong alias, a circular list so that
all aliases can be found from any of them. A new flag, is_weakalias,
distinguishes the weak symbol from a strong alias, and is used in all
places where we currently test u.weakdef != NULL.
With the original u.weakdef handling it was possible to have two or
more weak symbols pointing via u.weakdef to a strong definition.
Obviously that situation can't map to a circular list; One or more of
the weak symbols must point at another weak alias rather than the
strong definition. To handle that, I've added an accessor function to
return the strong definition.
* elf-bfd.h (struct elf_link_hash_entry): Add is_weakalias.
Rename u.weakdef to u.alias and update comment.
(weakdef): New static inline function.
* elflink.c (bfd_elf_record_link_assignment) Test is_weakalias
rather than u.weakdef != NULL, and use weakdef function.
(_bfd_elf_adjust_dynamic_symbol): Likewise.
(_bfd_elf_fix_symbol_flags): Likewise. Clear is_weakalias on
all aliases if def has been overridden in a regular object, not
u.weakdef.
(elf_link_add_object_symbols): Delete new_weakdef flag. Test
is_weakalias and use weakdef. Set is_weakalias and circular
u.alias. Update comments.
(_bfd_elf_gc_mark_rsec): Test is_weakalias rather than
u.weakdef != NULL and use weakdef function.
* elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Test
is_weakalias rather than u.weakdef != NULL and use weakdef
function. Assert that def is strong defined.
* elf32-arc.c (elf_arc_adjust_dynamic_symbol): Likewise.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise.
* elf32-bfin.c (elf32_bfinfdpic_adjust_dynamic_symbol): Likewise.
(bfin_adjust_dynamic_symbol): Likewise.
* elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
* elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise.
* elf32-frv.c (elf32_frvfdpic_adjust_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise.
* elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise.
* elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise.
* elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise.
* elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Likewise.
* elf32-nds32.c (nds32_elf_adjust_dynamic_symbol): Likewise.
* elf32-nios2.c (nios2_elf32_adjust_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf32-score.c (s3_bfd_score_elf_adjust_dynamic_symbol): Likewise.
* elf32-score7.c (s7_bfd_score_elf_adjust_dynamic_symbol): Likewise.
* elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_gc_mark_hook): Likewise.
(tilepro_elf_adjust_dynamic_symbol): Likewise.
* elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise.
* elf32-xtensa.c (elf_xtensa_adjust_dynamic_symbol): Likewise.
* elf64-alpha.c (elf64_alpha_adjust_dynamic_symbol): Likewise.
* elf64-hppa.c (elf64_hppa_adjust_dynamic_symbol): Likewise.
* elf64-ia64-vms.c (elf64_ia64_adjust_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise.
(ppc64_elf_adjust_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise.
* elfnn-ia64.c (elfNN_ia64_adjust_dynamic_symbol): Likewise.
* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_gc_mark_hook): Likewise.
(_bfd_sparc_elf_adjust_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_gc_mark_hook): Likewise.
(tilegx_elf_adjust_dynamic_symbol): Likewise.
* elfxx-x86.c (_bfd_x86_elf_adjust_dynamic_symbol): Likewise.
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For all ELF targers, call check_relocs after opening all inputs and
garbage collection. Since the symbol resolution is known, check_relocs
can be simplified. Also garbage collection doesn't need to undo what
check_relocs has done for symbols which have been garbage collected.
Since ELF targets never see the removed sections, gc_sweep_hook can be
removed from elf_backend_data and we can avoid GOT/PLT with garbage
collection now.
Set link_info.check_relocs_after_open_input to TRUE for all linker
targets which use ELF linker and update garbage collection tests to
remove unused GOT section.
ldemul_after_check_relocs is added for powerpc to support --secure-plt,
--bss-plt and --sdata-got.
Tested natively without regressions on i686, x86-64 and x32. Tested
cross binutils on x86-64 without regressions for aarch64-linux,
alpha-linux, arm-linux, bfin-elf, cr16-elf, cris-elf, crx-elf, frv-linux,
hppa64-linux, hppa-linux, ia64-linux, lm32-elf, m32r-elf, m68k-linux,
mcore-elf, metag-elf, microblaze-linux, mips-linux, mmix, mn10300-elf,
nds32le-linux, nios2-linux, or1k-elf, powerpc64-linux, powerpc-linux,
riscv32-linux, riscv64-linux, s390-linux, s390x-linux, score-elf,
sh3-linux, sparc64-linux, sparc-linux, tic6x-elf, tilegx-linux,
tilepro-linux, vax-linux, x86_64-mingw32 and xtensa-linux.
bfd/
* elf-bfd.h (elf_backend_data): Remove gc_sweep_hook.
* elf32-arm.c (elf32_arm_gc_sweep_hook): Removed.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-bfin.c (bfin_gc_sweep_hook): Likewise.
(bfinfdpic_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-cr16.c (elf32_cr16_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-cris.c (cris_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-hppa.c (elf32_hppa_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-lm32.c (lm32_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-m32r.c (m32r_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-m68k.c (elf_m68k_got_entry): Remove elf_m68k_gc_sweep_hook
from comments.
(elf_m68k_remove_got_entry_type): Removed.
(elf_m68k_find_got_entry_ptr): Likewise.
(elf_m68k_remove_got_entry): Likewise.
(elf_m68k_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-mcore.c (mcore_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-metag.c (elf_metag_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-microblaze.c (elf_backend_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-mips.c (elf_backend_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-nds32.c (nds32_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-nios2.c (nios2_elf32_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-or1k.c (or1k_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-ppc.c (ppc_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-s390.c (elf_s390_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-sparc.c (elf_backend_gc_sweep_hook): Likewise.
* elf32-tic6x.c (elf32_tic6x_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-tilegx.c (elf_backend_gc_sweep_hook): Likewise.
* elf32-tilepro.c (tilepro_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-vax.c (elf_vax_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf32-xtensa.c (elf_xtensa_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf64-alpha.c (elf64_alpha_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf64-mips.c (elf_backend_gc_sweep_hook): Likewise.
* elf64-mmix.c (mmix_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf64-ppc.c (elf_backend_gc_sweep_hook): Likewise.
(ppc64_elf_gc_sweep_hook): Likewise.
* elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elf64-sparc.c (elf_backend_gc_sweep_hook): Likewise.
* elf64-tilegx.c (elf_backend_gc_sweep_hook): Likewise.
* elflink.c (elf_link_add_object_symbols): Don't call
_bfd_elf_link_check_relocs here.
(gc_sweep_hook_fn): Removed.
(elf_gc_sweep): Remove gc_sweep_hook.
* elfnn-aarch64.c (elfNN_aarch64_gc_sweep_hook): Removed.
(elf_backend_gc_sweep_hook): Likewise.
* elfnn-riscv.c (riscv_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elfxx-mips.c (_bfd_mips_elf_gc_sweep_hook): Likewise.
* elfxx-mips.h (_bfd_mips_elf_gc_sweep_hook): Likewise.
(elf_backend_gc_sweep_hook): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_gc_sweep_hook): Likewise.
* elfxx-sparc.h (_bfd_sparc_elf_gc_sweep_hook): Likewise.
* elfxx-target.h (elf_backend_gc_sweep_hook): Likewise.
(elfNN_bed): Remove elf_backend_gc_sweep_hook.
* elfxx-tilegx.c (tilegx_elf_gc_sweep_hook): Removed.
* elfxx-tilegx.h (tilegx_elf_gc_sweep_hook): Likewise.
ld/
* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Removed.
* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_iamcu.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_k1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_l1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shelf32.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shelf_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shlelf32_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shlelf_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/shlelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emultempl/aarch64elf.em (gld${EMULATION_NAME}_before_parse):
Set link_info.check_relocs_after_open_input to TRUE.
* emultempl/armelf.em (gld${EMULATION_NAME}_before_parse):
Likewise.
* emultempl/scoreelf.em (gld${EMULATION_NAME}_before_parse):
Likewise.
* emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Add
after_parse_default.
* emultempl/armcoff.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/beos.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/gld960.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/gld960c.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/lnk960.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/m68kcoff.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/msp430.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/pe.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/pep.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/sunos.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/ticoff.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/vanilla.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Always
set link_info.check_relocs_after_open_input to TRUE.
(ld_${EMULATION_NAME}_emulation): Add $LDEMUL_AFTER_CHECK_RELOCS.
* emultempl/linux.em (gld${EMULATION_NAME}_before_parse):
Set link_info.check_relocs_after_open_input to TRUE.
(ld_${EMULATION_NAME}_emulation): Add after_check_relocs_default.
* emultempl/mmix-elfnmmo.em (mmix_before_parse): New function.
(LDEMUL_BEFORE_PARSE): New.
* emultempl/mmixelf.em (elfmmix_before_parse): Replace
gld${EMULATION_NAME}_before_parse with mmix_before_parse.
* emultempl/ppc32elf.em (ppc_after_open): Renamed to ...
(ppc_after_check_relocs): This. Call after_check_relocs_default
instead of gld${EMULATION_NAME}_after_open.
(LDEMUL_AFTER_OPEN): Removed.
(LDEMUL_AFTER_CHECK_RELOCS): New.
* ldemul.c (ldemul_after_check_relocs): New.
(after_check_relocs_default): Likewise.
* ldemul.h (ldemul_after_check_relocs): Likewise.
(after_check_relocs_default): Likewise.
(ld_emulation_xfer_struct): Add after_check_relocs.
* ldlang.c (lang_process): Call ldemul_after_check_relocs after
lang_check_relocs.
* testsuite/ld-aarch64/gc-got-relocs.d: Don't expect GOT section.
* testsuite/ld-aarch64/gc-tls-relocs.d: Likewise.
* testsuite/ld-cris/tls-gc-68.d: Likewise.
* testsuite/ld-cris/tls-gc-69.d: Likewise.
* testsuite/ld-cris/tls-gc-70.d: Likewise.
* testsuite/ld-cris/tls-gc-75.d: Likewise.
* testsuite/ld-cris/tls-gc-79.d: Likewise.
* testsuite/ld-mmix/bpo-10.d: Don't expect .MMIX.reg_contents
section.
|
|
Don't generate dynamic relocation against weak undefined symbol if it
is resolved to zero. FIXME: UNDEFWEAK_NO_DYNAMIC_RELOC may need to be
checked in more places.
PR ld/22269
* elfxx-mips.c (mips_elf_calculate_relocation): Don't generate
dynamic relocation if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
(allocate_dynrelocs): Don't allocate dynamic relocations if
UNDEFWEAK_NO_DYNAMIC_RELOC is true.
|
|
Fix a bug in commit a6ebf6169a1b ("MIPS: Convert cross-mode BAL to
JALX") and in BFD linker relaxation correct the microMIPS interpretation
of the branch offset, which is supposed to be shifted by 1 bit, rather
than 2 as in the regular MIPS case.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Correct microMIPS
branch offset interpretation.
gas/
* testsuite/gas/mips/branch-addend-micromips.d: New test.
* testsuite/gas/mips/branch-addend-micromips-n32.d: New test.
* testsuite/gas/mips/branch-addend-micromips-n64.d: New test.
* testsuite/gas/mips/branch-addend-micromips.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/bal-jalx-addend-micromips.d: New test.
* testsuite/ld-mips-elf/bal-jalx-addend-micromips-n32.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-addend-micromips-n64.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-local-micromips.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local-micromips-n32.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-local-micromips-n64.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-pic-micromips.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n32.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n64.d: New
test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
|
|
|
|
This patch uses the new %L _bfd_error_handler support for printing
bfd_vma arguments, and fixes a many other format and/or argument
errors in error messages.
bfd/
* binary.c (binary_set_section_contents): Don't print filepos in
error message.
(coff_write_object_contents): Cast size_t for error message.
(coff_slurp_line_table): Don't use bfd_vma symndx.
(coff_slurp_reloc_table): Remove unneeded cast.
* dwarf2.c (read_section): Cast bfd_int64_t to long long for
error message.
(find_abstract_instance_name): Likewise.
* elf32-arm.c (arm_type_of_stub): Correct error arg order.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Don't cast error arg.
(elf32_arm_check_relocs): Make r_symndx an int.
* elf32-cris.c (cris_elf_check_relocs): Delete extraneous %s in
format string.
* elf32-metag.c (elf_metag_relocate_section): Delete extra error
message arg.
* elf32-nds32.c (nds32_elf_ex9_build_hash_table): Rewrite bogus
error message.
* elf32-i386.c (elf_i386_check_relocs): Make r_symndx an int.
* elf32-s390.c (elf_s390_check_relocs): Likewise.
* elf32-tic6x.c (elf32_tic6x_check_relocs): Likewise.
* elf32-tilepro.c (tilepro_elf_check_relocs): Likewise.
* elf32-xtensa.c (elf_xtensa_check_relocs): Likewise.
* elf64-s390.c (elf_s390_check_relocs): Likewise.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Likewise.
* elfnn-riscv.c (riscv_elf_check_relocs): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
* elfxx-tilegx.c (tilegx_elf_check_relocs): Likewise.
* elf64-mmix.c (_bfd_mmix_after_linker_allocation): Cast size_t args
and use %lu for error message.
* elflink.c (elf_link_adjust_relocs): Delete extra error message arg.
* mmo.c (mmo_scan): Make stab_loc a file_ptr. Cast expression for
error message.
* elf32-arm.c (elf32_arm_tls_relax): Correct format string and args
in error message.
(elf32_arm_final_link_relocate): Likewise.
* coff-arm.c (bfd_arm_process_before_allocation): Likewise.
* coffcode.h (styp_to_sec_flags): Likewise.
* cofflink.c (_bfd_coff_write_global_sym): Likewise.
* ecoff.c (_bfd_ecoff_slurp_symbol_table): Likewise.
* elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise.
* elf32-bfin.c (bfinfdpic_check_relocs): Likewise.
(elf32_bfin_merge_private_bfd_data): Likewise.
* elf32-cris.c (cris_elf_relocate_section): Likewise.
* elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise.
* elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise.
(i370_elf_relocate_section): Likewise.
* elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise.
* elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise.
* elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
* elf32-mcore.c (mcore_elf_relocate_section): Likewise.
* elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise.
* elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise.
* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
* elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Likewise.
* ieee.c (ieee_write_id, read_id): Likewise.
* mach-o.c (bfd_mach_o_write_contents): Likewise.
(bfd_mach_o_layout_commands, bfd_mach_o_read_section_32): Likewise.
(bfd_mach_o_read_section_64, bfd_mach_o_read_symtab_symbol): Likewise.
(bfd_mach_o_read_command, bfd_mach_o_header_p): Likewise.
* peXXigen.c (_bfd_XXi_swap_aouthdr_in): Likewise.
* stabs.c (_bfd_link_section_stabs): Likewise.
* coff-arm.c (coff_arm_relocate_section): Use L modifier in error
format.
* coff-mcore.c (coff_mcore_relocate_section): Likewise.
* coff-ppc.c (coff_ppc_relocate_section): Likewise.
* coff-rs6000.c (xcoff_reloc_type_toc): Likewise.
* coff-sh.c (sh_relax_section): Likewise.
(sh_relax_delete_bytes, sh_swap_insns): Likewise.
* coff-tic80.c (coff_tic80_relocate_section): Likewise.
* coffcode.h (coff_slurp_reloc_table): Likewise.
* coffgen.c (_bfd_coff_get_external_symbols): Likewise.
(_bfd_coff_read_string_table): Likewise.
* cofflink.c (_bfd_coff_generic_relocate_section): Likewise.
* compress.c (bfd_get_full_section_contents): Likewise.
* dwarf2.c (read_formatted_entries, decode_line_info): Likewise.
* elf-m10300.c (mn10300_elf_relocate_section): Likewise.
* elf.c (bfd_elf_string_from_elf_section): Likewise.
* elf32-arc.c (arc_special_overflow_checks): Likewise.
* elf32-arm.c (elf32_arm_tls_relax): Likewise.
(elf32_arm_final_link_relocate, elf32_arm_relocate_section): Likewise.
(elf32_arm_write_section): Likewise.
* elf32-bfin.c (bfin_relocate_section): Likewise.
(bfinfdpic_relocate_section): Likewise.
* elf32-hppa.c (hppa_build_one_stub): Likewise.
(final_link_relocate, elf32_hppa_relocate_section): Likewise.
* elf32-i386.c (elf_i386_tls_transition): Likewise.
(elf_i386_relocate_section): Likewise.
* elf32-ip2k.c (ip2k_final_link_relocate): Likewise.
* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise.
* elf32-m32r.c (m32r_elf_relocate_section): Likewise.
* elf32-m68k.c (elf_m68k_relocate_section): Likewise.
* elf32-metag.c (elf_metag_relocate_section): Likewise.
* elf32-nds32.c (unrecognized_reloc_msg): Likewise.
(nds32_elf_relax_longcall1, nds32_elf_relax_longcall2): Likewise.
(nds32_elf_relax_longcall3, nds32_elf_relax_longjump1): Likewise.
(nds32_elf_relax_longjump2, nds32_elf_relax_longjump3): Likewise.
(nds32_elf_relax_longcall4, nds32_elf_relax_longcall5): Likewise.
(nds32_elf_relax_longcall6, nds32_elf_relax_longjump4): Likewise.
(nds32_elf_relax_longjump5, nds32_elf_relax_longjump6): Likewise.
(nds32_elf_relax_longjump7, nds32_elf_relax_loadstore): Likewise.
(nds32_elf_relax_ptr, nds32_elf_ex9_build_hash_table): Likewise.
* elf32-nios2.c (nios2_elf32_relocate_section): Likewise.
* elf32-rx.c (UNSAFE_FOR_PID): Likewise.
* elf32-s390.c (invalid_tls_insn, elf_s390_relocate_section): Likewise.
* elf32-score.c (s3_bfd_score_elf_check_relocs): Likewise.
* elf32-score7.c (s7_bfd_score_elf_check_relocs): Likewise.
* elf32-sh.c (sh_elf_relax_section): Likewise.
(sh_elf_relax_delete_bytes, sh_elf_swap_insns): Likewise.
(sh_elf_relocate_section): Likewise.
* elf32-sh64.c (shmedia_prepare_reloc): Likewise.
* elf32-spu.c (spu_elf_relocate_section): Likewise.
* elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise.
* elf32-tilepro.c (tilepro_elf_relocate_section): Likewise.
* elf32-v850.c (v850_elf_relax_section): Likewise.
* elf32-vax.c (elf_vax_check_relocs): Likewise.
(elf_vax_relocate_section): Likewise.
* elf32-xtensa.c (elf_xtensa_relocate_section): Likewise.
(extend_ebb_bounds_forward, extend_ebb_bounds_backward): Likewise.
(compute_text_actions, compute_ebb_proposed_actions): Likewise.
(do_fix_for_relocatable_link): Likewise.
* elf64-alpha.c (elf64_alpha_relax_got_load): Likewise.
(elf64_alpha_relax_with_lituse): Likewise.
* elf64-hppa.c (elf64_hppa_finish_dynamic_symbol): Likewise.
(elf_hppa_final_link_relocate): Likewise.
* elf64-ia64-vms.c (elf64_ia64_relax_section): Likewise.
(elf64_ia64_choose_gp, elf64_ia64_relocate_section): Likewise.
(elf64_vms_link_add_object_symbols): Likewise.
* elf64-mmix.c (mmix_elf_perform_relocation): Likewise.
(mmix_final_link_relocate): Likewise.
* elf64-s390.c (invalid_tls_insn): Likewise.
(elf_s390_relocate_section): Likewise.
* elf64-sh64.c (sh_elf64_relocate_section): Likewise.
* elf64-x86-64.c (elf_x86_64_tls_transition): Likewise.
(elf_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Likewise.
* elfcore.h (elf_core_file_p): Likewise.
* elflink.c (elf_link_read_relocs_from_section): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise.
(elfNN_aarch64_relocate_section): Likewise.
* elfnn-ia64.c (elfNN_ia64_relax_section): Likewise.
(elfNN_ia64_choose_gp, elfNN_ia64_relocate_section): Likewise.
* elfnn-riscv.c (riscv_elf_relocate_section): Likewise.
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol, mips_finish_exec_plt): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise.
* elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
* ieee.c (ieee_slurp_external_symbols): Likewise.
* ihex.c (ihex_write_object_content): Likewise.
* mach-o.c (bfd_mach_o_build_exec_seg_command): Likewise.
* merge.c (_bfd_merged_section_offset): Likewise.
* mmo.c (mmo_write_loc_chunk): Likewise.
(mmo_write_object_contents): Likewise.
* peXXigen.c (_bfd_XX_bfd_copy_private_bfd_data_common): Likewise.
* stabs.c (_bfd_link_section_stabs): Likewise.
* xcofflink.c (xcoff_link_add_symbols, xcoff_find_tc0): Likewise.
ld/
* testsuite/ld-arc/nps-1b.err: Update.
* testsuite/ld-x86-64/ilp32-11.d: Update.
|
|
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with
the MIPS16e2 ASE as per documentation, including in particular:
1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW
MIPS16e2 instructions[1], for assembly and disassembly,
2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE
regular MIPS instructions[2], for assembly and disassembly,
3. ELF binary file annotation for the interAptiv MR2 MIPS architecture
extension.
4. Support for interAptiv MR2 architecture selection for assembly, in
the form of the `-march=interaptiv-mr2' command-line option and its
corresponding `arch=interaptiv-mr2' setting for the `.set' and
`.module' pseudo-ops.
5. Support for interAptiv MR2 architecture selection for disassembly,
in the form of the `mips:interaptiv-mr2' target architecture, for
use e.g. with the `-m' command-line option for `objdump'.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 interAptiv Multiprocessing System Software User's Manual",
Imagination Technologies Ltd., Document Number: MD00904, Revision
02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific
Instructions", pp. 878-883
[2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917
include/
* elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
(AFL_EXT_INTERAPTIV_MR2): Likewise.
* opcode/mips.h: Document new operand codes defined.
(INSN_INTERAPTIV_MR2): New macro.
(INSN_CHIP_MASK): Adjust accordingly.
(CPU_INTERAPTIV_MR2): New macro.
(cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
(MIPS16_ALL_ARGS): Rename to...
(MIPS_SVRS_ALL_ARGS): ... this.
(MIPS16_ALL_STATICS): Rename to...
(MIPS_SVRS_ALL_STATICS): ... this.
bfd/
* archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
* cpu-mips.c (I_interaptiv_mr2): New enum value.
(arch_info_struct): Add "mips:interaptiv-mr2" entry.
* elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
case.
(mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
(mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
`bfd_mach_mips_interaptiv_mr2' entries.
* bfd-in2.h: Regenerate.
opcodes/
* mips-formats.h (INT_BIAS): New macro.
(INT_ADJ): Redefine in INT_BIAS terms.
* mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
(mips_print_save_restore): New function.
(print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
(validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
call.
(print_insn_args): Handle OP_SAVE_RESTORE_LIST.
(print_mips16_insn_arg): Call `mips_print_save_restore' for
OP_SAVE_RESTORE_LIST handling, factored out from here.
* mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
(RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
(mips_builtin_opcodes): Add "restore" and "save" entries.
* mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
(IAMR2): New macro.
(mips16_opcodes): Add "copyw" and "ucopyw" entries.
binutils/
* readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case.
(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
* NEWS: Mention Imagination interAptiv MR2 processor support.
gas/
* config/tc-mips.c (validate_mips_insn): Handle
OP_SAVE_RESTORE_LIST specially.
(mips_encode_save_restore, mips16_encode_save_restore): New
functions.
(match_save_restore_list_operand): Factor out SAVE/RESTORE
operand insertion into the instruction word or halfword to these
new functions.
(mips_cpu_info_table): Add "interaptiv-mr2" entry.
* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
`-march=' argument list.
|
|
Make BFD agree with GAS and mark the LSI MiniRISC CW4010 processor core
(for an odd reason referred to as LSI R4010 across our code base) as a
MIPS II processor in BFD as well, fixing a bug that has been there since
forever and addressing linker warnings like:
$ as -m4010 empty.s -o 4010.o
$ ld -r 4010.o -o 4010-r.o
ld: 4010.o: warning: Inconsistent ISA between e_flags and .MIPS.abiflags
$
due to the ISA level being recorded as MIPS III in ELF file header's
`e_flags' vs MIPS II in the MIPS ABI Flags section:
$ readelf -Ah 4010.o
ELF Header:
Magic: 7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00
Class: ELF32
Data: 2's complement, big endian
Version: 1 (current)
OS/ABI: UNIX - System V
ABI Version: 0
Type: REL (Relocatable file)
Machine: MIPS R3000
Version: 0x1
Entry point address: 0x0
Start of program headers: 0 (bytes into file)
Start of section headers: 348 (bytes into file)
Flags: 0x20821000, 4010, o32, mips3
Size of this header: 52 (bytes)
Size of program headers: 0 (bytes)
Number of program headers: 0
Size of section headers: 40 (bytes)
Number of section headers: 11
Section header string table index: 10
Attribute Section: gnu
File Attributes
Tag_GNU_MIPS_ABI_FP: Hard float (double precision)
MIPS ABI Flags Version: 0
ISA: MIPS2
GPR size: 32
CPR1 size: 32
CPR2 size: 0
FP ABI: Hard float (double precision)
ISA Extension: LSI R4010
ASEs:
None
FLAGS 1: 00000000
FLAGS 2: 00000000
$
Available documentation[1][2] clearly indicates the LSI CW4010 processor
is only backwards compatible with the MIPS R4000 processor as far as the
latter's 32-bit instructions are concerned and consequently can only be
considered a MIPS II ISA implementation (with vendor extensions).
This fixes an LD testsuite failure:
FAIL: MIPS incompatible objects: "-march=r4010 -32" "-march=r4650 -32"
triggered for the `mips-sgi-irix5' and `mips-sgi-irix6' targets.
References:
[1] Paul Cobb, Bob Caulk, Joe Cesana, "The MiniRISC CW4010: A
Superscalar MIPS Processor ASIC Core", LSI Logic, July 1995,
presented at Hot Chips VII, Stanford University, Stanford,
California, August 1995
[2] "MiniRISC MR4010 Superscalar Microprocessor Reference Device", LSI
Logic, November 1996, Doc. No. DB09-000028-00, Order No. C15017
bfd/
* cpu-mips.c (arch_info_struct): Mark the 4010 32-bit.
* elfxx-mips.c (mips_set_isa_flags) <bfd_mach_mips4010>: Set
E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'.
(mips_mach_extensions): Mark `bfd_mach_mips4010' as extending
`bfd_mach_mips6000' rather than `bfd_mach_mips4000'.
ld/
* testsuite/ld-mips-elf/lsi-4010-isa.d: New test.
* ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
|
|
bfd/ChangeLog:
2017-06-06 Jose E. Marchesi <jose.marchesi@oracle.com>
* elfxx-mips.c (_bfd_mips_elf_relocate_section): Remove unused
variable `bed'.
* elf32-score.c (score_elf_final_link_relocate): Likewise.
(s3_bfd_score_elf_check_relocs): Likewise.
* elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise.
(score_elf_final_link_relocate): Likewise.
(s7_bfd_score_elf_check_relocs): Likewise.
|
|
Correct a commit e5713223cbc1 ("MIPS/BFD: For n64 hold the number of
internal relocs in `->reloc_count'") regression and change internal
relocation handling in the generic ELF BFD linker code such that, except
in the presence of R_SPARC_OLO10 relocations, a section's `reloc_count'
holds the number of internal rather than external relocations, making
the handling more consistent between GAS, which sets `->reloc_count'
with a call to `bfd_set_reloc', and LD, which sets `->reloc_count' as it
reads input sections.
The handling of dynamic relocations remains unchanged and they continue
holding the number of external relocations in `->reloc_count'; they are
also not converted to the internal form except in `elf_link_sort_relocs'
(which does not handle the general, i.e. non-n64-MIPS case of composed
relocations correctly as per the ELF gABI, though it does not seem to
matter for the targets we currently support).
The n64 MIPS backend is the only one with `int_rels_per_ext_rel' set to
non-one, and consequently the change is trivial for all the remaining
backends and targets.
bfd/
* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Subtract `count'
from `reloc_count' rather than decrementing it.
* elf.c (bfd_section_from_shdr): Multiply the adjustment to
`reloc_count' by `int_rels_per_ext_rel'.
* elf32-score.c (score_elf_final_link_relocate): Do not multiply
`reloc_count' by `int_rels_per_ext_rel' for last relocation
entry determination.
(s3_bfd_score_elf_check_relocs): Likewise.
* elf32-score7.c (score_elf_final_link_relocate): Likewise.
(s7_bfd_score_elf_relocate_section): Likewise.
(s7_bfd_score_elf_check_relocs): Likewise.
* elf64-mips.c (mips_elf64_get_reloc_upper_bound): Remove
prototype and function.
(mips_elf64_slurp_one_reloc_table): Do not update `reloc_count'.
(mips_elf64_slurp_reloc_table): Assert that `reloc_count' is
triple rather than once the sum of REL and RELA relocation entry
counts.
(bfd_elf64_get_reloc_upper_bound): Remove macro.
* elflink.c (_bfd_elf_link_read_relocs): Do not multiply
`reloc_count' by `int_rels_per_ext_rel' for internal relocation
storage allocation size determination.
(elf_link_input_bfd): Multiply `.ctors' and `.dtors' section's
size by `int_rels_per_ext_rel'. Do not multiply `reloc_count'
by `int_rels_per_ext_rel' for last relocation entry
determination.
(bfd_elf_final_link): Do not multiply `reloc_count' by
`int_rels_per_ext_rel' for internal relocation storage
allocation size determination.
(init_reloc_cookie_rels): Do not multiply `reloc_count' by
`int_rels_per_ext_rel' for last relocation entry determination.
(elf_gc_smash_unused_vtentry_relocs): Likewise.
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
|
|
Since the flag is now set only for regular object refs.
include/
* bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to
non_ir_ref_regular.
bfd/
* elf-m10300.c: Rename occurrences of non_ir_ref.
* elf32-arm.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cr16.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-dlx.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-lm32.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-moxie.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-mt.c: Likewise.
* elf32-nios2.c: Likewise.
* elf32-or1k.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf32-tilepro.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfnn-riscv.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c: Likewise.
* linker.c: Likewise.
ld/
* plugin.c: Rename occurrences of non_ir_ref.
|
|
Add MIPS16e2 ASE support as per the architecture specification[1],
including in particular:
1. A new ELF ASE flag to mark MIPS16e2 binaries.
2. MIPS16e2 instruction assembly support, including a relaxation update
to use LUI rather than an LI/SLL instruction pair for loading the
high part of 32-bit addresses.
3. MIPS16e2 instruction disassembly support, including updated rules for
extended forms of instructions that are now subdecoded and therefore
do not alias to the original MIPS16 ISA revision instructions even
for encodings that are not valid in the MIPS16e2 instruction set.
Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their
corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and
`.module' pseudo-ops. Control the availability of the MT ASE subset of
the MIPS16e2 instruction set with a combination of these controls and
the preexisting MT ASE controls.
Parts of this change by Matthew Fortune and Andrew Bennett.
References:
[1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific
Extension Technical Reference Manual", Imagination Technologies
Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016
include/
* elf/mips.h (AFL_ASE_MIPS16E2): New macro.
(AFL_ASE_MASK): Adjust accordingly.
* opcode/mips.h: Document new operand codes defined.
(mips_operand_type): Add OP_REG28 enum value.
(INSN2_SHORT_ONLY): Update description.
(ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros.
bfd/
* elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE.
opcodes/
* mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and
ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry.
(mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag.
(print_insn_arg) <OP_REG28>: Add handler.
(validate_insn_args) <OP_REG28>: Handle.
(print_mips16_insn_arg): Handle MIPS16 instructions that require
32-bit encoding and 9-bit immediates.
(print_insn_mips16): Handle MIPS16 instructions that require
32-bit encoding and MFC0/MTC0 operand decoding.
* mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'>
<'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers.
(RD_C0, WR_C0, E2, E2MT): New macros.
(mips16_opcodes): Add entries for MIPS16e2 instructions:
GP-relative "addiu" and its "addu" spelling, "andi", "cache",
"di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh",
"lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0",
"movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause",
"pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw"
instructions, "swl", "swr", "sync" and its "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases,
"xori", "dmt", "dvpe", "emt" and "evpe". Add split
regular/extended entries for original MIPS16 ISA revision
instructions whose extended forms are subdecoded in the MIPS16e2
ISA revision: "li", "sll" and "srl".
binutils/
* readelf.c (print_mips_ases): Handle MIPS16e2 ASE.
* NEWS: Mention MIPS16e2 ASE support.
gas/
* config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag.
(RELAX_MIPS16_E2): New macro.
(RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO)
(RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT)
(RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT)
(RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED)
(RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED)
(RELAX_MIPS16_MARK_ALWAYS_EXTENDED)
(RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO)
(RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits.
(mips16_immed_extend): New prototype.
(options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum
values.
(md_longopts): Add "mmips16e2" and "mno-mips16e2" options.
(mips_ases): Add "mips16e2" entry.
(mips_set_ase): Handle MIPS16e2 ASE.
(insn_insert_operand): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(is_opcode_valid_16): Pass enabled ASE bitmask on to
`opcode_is_member'.
(validate_mips_insn): Explicitly handle immediates with MIPS16
instructions that require 32-bit encoding.
(operand_reg_mask) <OP_REG28>: Add handler.
(match_reg28_operand): New function.
(match_operand) <OP_REG28>: Add handler.
(append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE.
(match_mips16_insn): Handle MIPS16 instructions that require
32-bit encoding and `V' and `u' operand codes.
(mips16_ip): Allow any characters except from `.' in opcodes.
(mips16_immed_extend): Handle 9-bit immediates. Do not shuffle
immediates whose width is not one of these listed.
(md_estimate_size_before_relax): Handle MIPS16e2 relaxation.
(mips_relax_frag): Likewise.
(md_convert_frag): Likewise.
(mips_convert_ase_flags): Handle MIPS16e2 ASE.
* doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(-mmips16e2, -mno-mips16e2): New options.
* doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and
`-mno-mips16e2' options.
(MIPS ASE Instruction Generation Overrides): Add `.set mips16e2'
and `.set nomips16e2'.
|
|
* elf-bfd.h (struct elf_backend_data): Make asection param of
elf_backend_eh_frame_address_size const.
(_bfd_elf_eh_frame_address_size): Likewise.
* elf32-m32c.c (_bfd_m32c_elf_eh_frame_address_size): Likewise.
* elf32-msp430.c (elf32_msp430_eh_frame_address_size): Likewise.
* elfxx-mips.c (_bfd_mips_elf_eh_frame_address_size): Likewise.
* elfxx-mips.h (_bfd_mips_elf_eh_frame_address_size): Likewise.
* elf-eh-frame.c (_bfd_elf_eh_frame_address_size): Likewise.
(next_cie_fde_offset): Constify params.
(offset_adjust, adjust_eh_frame_local_symbols): Likewise.
|
|
Move the comment about dynamic symbol sorting next to where it happens.
bfd/
* elfxx-mips.c (_bfd_mips_elf_final_link): Reorder comment about
dynamic symbol sorting.
|
|
Not a comprehensive change, just some split out from fixes made for
the %A and %B changes.
* coffcode.h: Wrap some overly long _bfd_error_handler args.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-mep.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
|
|
* aoutx.h: Use %B and %A in error messages throughout file.
* aout-cris.c: Likewise.
* archive.c: Likewise.
* binary.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-tic4x.c: Likewise.
* coffcode.h: Likewise.
* coffgen.c: Likewise.
* cofflink.c: Likewise.
* coffswap.h: Likewise.
* cpu-arm.c: Likewise.
* elf-eh-frame.c: Likewise.
* elf-m10300.c: Likewise.
* elf.c: Likewise.
* elf32-arc.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh64.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-visium.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-sh64.c: Likewise.
* elfcode.h: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* hpux-core.c: Likewise.
* ieee.c: Likewise.
* ihex.c: Likewise.
* linker.c: Likewise.
* merge.c: Likewise.
* mmo.c: Likewise.
* oasys.c: Likewise.
* pdp11.c: Likewise.
* peXXigen.c: Likewise.
* rs6000-core.c: Likewise.
* vms-alpha.c: Likewise.
* xcofflink.c: Likewise.
|
|
This steals _doprnt from libiberty, extended to handle %A and %B.
Which lets us do away with the current horrible %A and %B handling
that requires all %A and %B arguments to be passed first, rather than
in the natural order.
* bfd.c (PRINT_TYPE): Define.
(_doprnt): New function.
(error_handler_internal): Use _doprnt.
* coff-arm.c: Put %A and %B arguments to _bfd_error_handler
calls in their natural order, throughout file.
* coff-mcore.c: Likewise.
* coff-ppc.c: Likewise.
* coff-tic80.c: Likewise.
* cofflink.c: Likewise.
* elf-s390-common.c: Likewise.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-spu.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-sparc.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
|
|
I'd made this dynamic section read-only so a flag test distinguished
it from .dynbss, but like any other .data.rel.ro section it really
should be marked read-write. (It is read-only after relocation, not
before.) When using the standard linker scripts this usually doesn't
matter since the output section is among other read-write sections and
not page aligned. However, it might matter in the extraordinary case
of the dynamic section being the only .data.rel.ro section with the
output section just happening to be page aligned and a multiple of a
page in size. In that case the output section would be read-only, and
live it its own read-only PT_LOAD segment, which is incorrect.
* elflink.c (_bfd_elf_create_dynamic_sections): Don't make
dynamic .data.rel.ro read-only.
* elf32-arm.c (elf32_arm_finish_dynamic_symbol): Compare section
rather than section flags when deciding where copy reloc goes.
* elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise.
* elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_finish_dynamic_symbol): Likewise.
* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Likewise.
* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_finish_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Likewise.
* elfnn-riscv.c (riscv_elf_finish_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_finish_dynamic_symbol): Likewise.
|
|
Interpret the `jalr $0, $25' instruction encoding with an R_MIPS_JALR
relocation attached as an alias to `jr $25' and convert the jump to an
equivalent branch where possible, consequently covering the MIPSr6
architecture for the purpose of this optimization too.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Also handle the
`jalr $0, $25' instruction encoding.
gas/
* testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions.
* testsuite/gas/mips/jalr4.d: Adjust accordingly. Remove MIPSr6
encoding patterns.
* testsuite/gas/mips/jalr4-n64.d: Likewise.
* testsuite/gas/mips/mipsr6@jalr4.d: New test.
* testsuite/gas/mips/mipsr6@jalr4-n32.d: New test.
* testsuite/gas/mips/mipsr6@jalr4-n64.d: New test.
ld/
* testsuite/ld-mips-elf/jalr4.dd: Adjust for `jalr $0, $25'
instructions.
* testsuite/ld-mips-elf/jalr4-r6.dd: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
|
|
Remove separate original NewABI JALR relocation handling, introduced
with commit d06471104a83 ("relax jalr $t9 [R_MIPS_JALR symbol] to bal
symbol"), <https://sourceware.org/ml/binutils/2003-03/msg00394.html>,
and only used by LD with the `--relax' option specified, and rely solely
on `mips_elf_perform_relocation' code, which has been introduced with
commit 1367d393bb74 ("On the RM9000 convert jal to bal if in range"),
<https://www.sourceware.org/ml/binutils/2004-12/msg00088.html> and since
made more complete, across all the three ABIs.
Also remove the `--relax' option, now irrelevant, from the tests added
with the former commit.
bfd/
* elfxx-mips.h (_bfd_mips_relax_section): Remove prototype.
* elfxx-mips.c (_bfd_mips_relax_section): Remove function.
* elf64-mips.c (bfd_elf64_bfd_relax_section): Remove macro.
* elfn32-mips.c (bfd_elf32_bfd_relax_section): Likewise.
ld/
* testsuite/ld-mips-elf/relax-jalr-n32.d: Remove `--relax'
option.
* testsuite/ld-mips-elf/relax-jalr-n32-shared.d: Likewise.
* testsuite/ld-mips-elf/relax-jalr-n64.d: Likewise.
* testsuite/ld-mips-elf/relax-jalr-n64-shared.d: Likewise.
|
|
Discard R_MIPS_JALR and R_MICROMIPS_JALR relocations associated with
jumps that cannot be converted to an equivalent branch right away in
`mips_elf_calculate_relocation' rather than letting them through to
`mips_elf_perform_relocation'. This includes cross-mode jumps which
need to flip the ISA bit or jumps to a misaligned location that cannot
be encoded with a branch, in addition to preemptible symbol references
already handled.
Cross-mode jumps are actually already rejected as the conversion is made
in `mips_elf_perform_relocation', so in this case this change only saves
some processing. Jumps to a misaligned location are however converted,
with bits causing misalignment lost, making resulting code functionally
different even if the lone effect is avoiding an address error exception
with an instruction fetch at the jump destination requested.
Add test cases suitable, also including GAS verification to confirm that
the JALR relocations explicitly requested have indeed been output in the
intermediate objects used.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR>
<R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p'
or misaligned.
gas/
* testsuite/gas/mips/jalr4.d: New test.
* testsuite/gas/mips/jalr4-n32.d: New test.
* testsuite/gas/mips/jalr4-n64.d: New test.
* testsuite/gas/mips/jalr4.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/jalr4.dd: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
|
|
Ensure all local symbols precede external symbols in the dynamic symbol
table.
No local symbols are expected to make it to the dynamic symbol table
except for section symbols already taken care of, so this is really a
safeguard only against a potential BFD bug otherwise not so harmful,
which may become a grave one due to a symbol table sorting requirement
violation (see PR ld/20828 for an example). This means however that no
test suite coverage is possible for this change as code introduced here
is not normally expected to trigger.
Logically split then the part of the dynamic symbol table which is not
global offset table mapped, into a local area at the beginning and an
external area following. By the time `mips_elf_sort_hash_table' is
called we have the number of local dynamic symbol table entries (section
and non-section) already counted in `local_dynsymcount', so use it to
offset the external area from the beginning.
bfd/
* elfxx-mips.c (mips_elf_hash_sort_data): Add
`max_local_dynindx'.
(mips_elf_sort_hash_table): Handle it.
(mips_elf_sort_hash_table_f) <GGA_NONE>: For forced local
symbols bump up `max_local_dynindx' rather than
`max_non_got_dynindx'.
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|
Use the `bfd_size_type' data type for dynamic symbol table indices in
the MIPS backend, in line with generic code and removing the need to use
a cast.
bfd/
* elfxx-mips.c (mips_elf_hash_sort_data): Convert the
`min_got_dynindx', `max_unref_got_dynindx' and
`max_non_got_dynindx' members to the `bfd_size_type' data type.
(mips_elf_sort_hash_table): Adjust accordingly.
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|
Make all hash table references throughout `mips_elf_sort_hash_table' use
`htab', simplifying code and improving readability.
bfd/
* elfxx-mips.c (mips_elf_sort_hash_table): Use `htab' throughout
to access the hash table.
|
|
Move the assertion on non-NULL `htab' in `mips_elf_sort_hash_table' to
the beginning, before the pointer is dereferenced (`mips_elf_hash_table
(info)' and `elf_hash_table (info)' both point to the same memory
location, differently typed).
bfd/
* elfxx-mips.c (mips_elf_sort_hash_table): Move assertion on
non-NULL `htab' to the beginning.
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Complement commit 9d862524f6ae ("MIPS: Verify the ISA mode and alignment
of branch and jump targets") and add GAS and LD options to control the
checks for invalid branches between ISA modes introduced there, to help
with some handwritten code lacking `.insn' annotation for labels used as
branch targets and code produced by older versions of GCC which suffers
from the issue with branches to code that has been optimized away,
addressed with GCC commit 242424 ("MIPS/GCC: Mark trailing labels with
`.insn'"), <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01061.html>.
bfd/
* elfxx-mips.h (_bfd_mips_elf_insn32): Rename prototype to...
(_bfd_mips_elf_linker_flags): ... this. Add another parameter.
* elfxx-mips.c (mips_elf_link_hash_table): Add
`ignore_branch_isa' member.
(mips_elf_perform_relocation): Do not treat an ISA mode mismatch
in branch relocation calculation as an error if
`ignore_branch_isa' has been set.
(_bfd_mips_elf_insn32): Rename to...
(_bfd_mips_elf_linker_flags): ... this. Rename the `on'
parameter to `insn32' and add an `ignore_branch_isa' parameter.
Handle the new parameter.
gas/
* config/tc-mips.c (mips_ignore_branch_isa): New variable.
(options): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(md_longopts): Add "mignore-branch-isa" and
"mno-ignore-branch-isa" options.
(md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
(fix_bad_cross_mode_branch_p): Return FALSE if
`mips_ignore_branch_isa' has been set.
(md_show_usage): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa'.
* doc/as.texinfo (Target MIPS options): Add
`-mignore-branch-isa' and `-mno-ignore-branch-isa' options.
(-mignore-branch-isa, -mno-ignore-branch-isa): New options.
* doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa' options.
* testsuite/gas/mips/branch-local-ignore-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-3.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* emultempl/mipself.em (ignore_branch_isa): New variable.
(mips_create_output_section_statements): Rename
`_bfd_mips_elf_insn32' called to `_bfd_mips_elf_linker_flags',
add `ignore_branch_isa' argument.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(PARSE_AND_LIST_LONGOPTS): Add "ignore-branch-isa" and
"no-ignore-branch-isa" options.
(PARSE_AND_LIST_OPTIONS): Add `--ignore-branch-isa' and
`--no-ignore-branch-isa'.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
* ld.texinfo (Options specific to MIPS targets): Add
`--ignore-branch-isa' and `--no-ignore-branch-isa' options.
(ld and the MIPS family): Likewise.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-mips16: New
test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-micromips: New
test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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Variables defined in shared libraries are copied into an executable's
.bss section when code in the executable is non-PIC and thus would
require dynamic text relocations to access the variable directly in
the shared library. Recent x86 toolchains also copy variables into
the executable to gain a small speed improvement.
The problem is that if the variable was originally read-only, the copy
in .bss is writable, potentially opening a security hole. This patch
cures that problem by putting the copy in a section that becomes
read-only after ld.so relocation, provided -z relro is in force.
The patch also fixes a microblaze linker segfault on attempting to
use dynamic bss variables.
bfd/
PR ld/20995
* elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and
sreldynrelro.
(struct elf_backend_data): Add want_dynrelro.
* elfxx-target.h (elf_backend_want_dynrelro): Define.
(elfNN_bed): Update initializer.
* elflink.c (_bfd_elf_create_dynamic_sections): Create
sdynrelro and sreldynrelro sections.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables
copied into the executable from read-only sections into sdynrelro.
(elf32_arm_size_dynamic_sections): Handle sdynrelro.
(elf32_arm_finish_dynamic_symbol): Select sreldynrelro for
dynamic relocs in sdynrelro.
(elf_backend_want_dynrelro): Define.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol)
(elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-i386.c (elf_i386_adjust_dynamic_symbol)
(elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol)
(elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol)
(microblaze_elf_size_dynamic_sections)
(microblaze_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol)
(nios2_elf32_adjust_dynamic_symbol)
(nios2_elf32_size_dynamic_sections)
(elf_backend_want_dynrelro): As above.
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol)
(or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections)
(elf_backend_want_dynrelro): As above.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol)
(ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol)
(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol)
(elf32_tic6x_size_dynamic_sections)
(elf32_tic6x_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol)
(tilepro_elf_size_dynamic_sections)
(tilepro_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol)
(ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol)
(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol)
(elf_x86_64_size_dynamic_sections)
(elf_x86_64_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol)
(elfNN_aarch64_size_dynamic_sections)
(elfNN_aarch64_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol)
(riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol)
(_bfd_mips_elf_size_dynamic_sections)
(_bfd_mips_vxworks_finish_dynamic_symbol): As above.
* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol)
(_bfd_sparc_elf_size_dynamic_sections)
(_bfd_sparc_elf_finish_dynamic_symbol): As above.
* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol)
(tilegx_elf_size_dynamic_sections)
(tilegx_elf_finish_dynamic_symbol): As above.
* elf32-mips.c (elf_backend_want_dynrelro): Define.
* elf64-mips.c (elf_backend_want_dynrelro): Define.
* elf32-sparc.c (elf_backend_want_dynrelro): Define.
* elf64-sparc.c (elf_backend_want_dynrelro): Define.
* elf32-tilegx.c (elf_backend_want_dynrelro): Define.
* elf64-tilegx.c (elf_backend_want_dynrelro): Define.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy.
(microblaze_elf_size_dynamic_sections): Handle sdynbss.
* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use
of linker shortcuts to dynamic sections rather than comparing
names. Correctly set "got" flag.
ld/
PR ld/20995
* testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed
stub hash table traversal caused by section id increment. Accept
the previous output too.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib.d: Likewise.
* testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s,
* testsuite/ld-elf/pr20995.r: New test.
* testsuite/ld-elf/elf.exp: Run it.
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Also, create .rel{,a}.bss for PIEs on all targets, not just x86.
* elf-bfd.h (struct elf_link_hash_table): Add sdynbss and srelbss.
* elflink.c (_bfd_elf_create_dynamic_sections): Set them. Create
.rel.bss/.rela.bss for executables, both PIE and non-PIE.
* elf32-arc.c (struct elf_arc_link_hash_table): Delete srelbss.
Use ELF hash table var throughout.
* elf32-arm.c (struct elf32_arm_link_hash_table): Delete sdynbss
and srelbss. Use ELF hash table vars throughout.
* elf32-hppa.c (struct elf32_hppa_link_hash_table): Likewise.
* elf32-i386.c (struct elf_i386_link_hash_table): Likewise.
* elf32-metag.c (struct elf_metag_link_hash_table): Likewise.
* elf32-microblaze.c (struct elf32_mb_link_hash_table): Likewise.
* elf32-nios2.c (struct elf32_nios2_link_hash_table): Likewise.
* elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise.
* elf32-ppc.c (struct ppc_elf_link_hash_table): Likewise.
* elf32-s390.c (struct elf_s390_link_hash_table): Likewise.
* elf32-tic6x.c (struct elf32_tic6x_link_hash_table): Likewise.
* elf32-tilepro.c (struct tilepro_elf_link_hash_table): Likewise.
* elf64-ppc.c (struct ppc_link_hash_table): Likewise.
* elf64-s390.c (struct elf_s390_link_hash_table): Likewise.
* elf64-x86-64.c (struct elf_x86_64_link_hash_table): Likewise.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Likewise.
* elfnn-riscv.c (struct riscv_elf_link_hash_table): Likewise.
* elfxx-mips.c (struct mips_elf_link_hash_table): Likewise.
* elfxx-sparc.h (struct _bfd_sparc_elf_link_hash_table): Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c (struct tilegx_elf_link_hash_table): Likewise.
* elf32-arc.c (arc_elf_create_dynamic_sections): Delete.
(elf_backend_create_dynamic_sections): Use base ELF version.
* elf32-microblaze.c (microblaze_elf_create_dynamic_sections): Delete.
(elf_backend_create_dynamic_sections): Use base ELF version.
* elf32-or1k.c (or1k_elf_create_dynamic_sections): Delete.
(elf_backend_create_dynamic_sections): Use base ELF version.
* elf32-s390.c (elf_s390_create_dynamic_sections): Delete.
(elf_backend_create_dynamic_sections): Use base ELF version.
* elf64-ppc.c (ppc64_elf_create_dynamic_sections): Delete.
(elf_backend_create_dynamic_sections): Use base ELF version.
* elf64-s390.c (elf_s390_create_dynamic_sections): Delete.
(elf_backend_create_dynamic_sections): Use base ELF version.
* elf32-tilepro.c (tilepro_elf_create_dynamic_sections): Remove
extraneous tests.
* elfnn-aarch64.c (elfNN_aarch64_create_dynamic_sections): Likewise.
* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Likewise.
* elfxx-tilegx.c (tilegx_elf_create_dynamic_sections): Likewise.
* elf32-i386.c (elf_i386_create_dynamic_sections): Don't create
".rel.bss" for executables.
* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Don't create
".rela.bss" for executables.
* elf32-nios2.c (nios2_elf32_create_dynamic_sections): Don't
ignore return status from _bfd_elf_create_dynamic_sections.
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Revert commit 17733f5be961 ("Increment the ABIVERSION to 5 for MIPS
objects with non-executable stacks.") and remove EI_ABIVERSION 5
allocation for PT_GNU_STACK support, which has not made it to glibc
and will be reassigned.
bfd/
* bfd/elfxx-mips.c (_bfd_mips_post_process_headers): Revert
2016-02-23 change and remove EI_ABIVERSION 5 support.
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Respect any ASE flags recorded in ELF file structures for the purpose of
selecting instructions to be disassembled, preventing code from being
hex-dumped even though having been clearly indicated as valid at the
assembly time. Use date from the MIPS ABI flags structure if present,
and otherwise there may be an MDMX ASE flag set in the ELF file header.
For backwards compatibility only set extra flags and do not clear any,
preserving all previously set by the architecture selected to be
disassembled for.
include/
* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
typedef as `elf_internal_abiflags_v0'.
bfd/
* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
(bfd_mips_elf_get_abiflags): New prototype.
* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
* bfd-in2.h: Regenerate.
opcodes/
* mips-dis.c (mips_convert_abiflags_ases): New function.
(set_default_mips_dis_options): Also infer ASE flags from ELF
file structures.
binutils/
* testsuite/binutils-all/mips/mips-ase-1.d: New test.
* testsuite/binutils-all/mips/mips-ase-2.d: New test.
* testsuite/binutils-all/mips/mips-ase-3.d: New test.
* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
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PR ld/16720
* elfxx-mips.c (mips_elf_calculate_relocation): Remove overflow
test for HI16 relocs.
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Now that all targets creating .rel.plt/.rela.plt use the ELF hash
table shortcut srelplt, the generic ELF code can set up DT_RELSZ/
DT_RELASZ and DT_REL/DT_RELA for targets that don't want PLT relocs
included in those tags.
* elf-bfd.h (struct elf_backend_data): Add dtrel_excludes_plt.
* elfxx-target.h (elf_backend_dtrel_excludes_plt): Define.
(elfNN_bed): Init new field.
* elflink.c (bfd_elf_final_link): Add and use htab variable. Handle
dtrel_excludes_plt.
* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Delete
DT_RELASZ code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-arc.c (elf_arc_finish_dynamic_sections): Delete DT_RELASZ code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-arm.c (elf32_arm_finish_dynamic_sections): Delete code
subtracting off plt relocs from DT_RELSZ, DT_RELASZ.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Delete
DT_RELASZ code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-cris.c (elf_cris_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-hppa.c (elf32_hppa_finish_dynamic_sections): Delete DT_RELASZ
and DT_RELA code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-i386.c (elf_i386_finish_dynamic_sections): Delete DT_RELSZ
and DT_REL code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-metag.c (elf_metag_finish_dynamic_sections): Delete DT_RELASZ
and DT_RELA code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Delete
DT_RELASZ and DT_RELA code. Use ELF htab shortcuts for other
dynamic sections.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-mips.c (elf_backend_dtrel_excludes_plt): Define.
* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-ppc.c (ppc_elf_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-sh.c (sh_elf_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-sparc.c (elf_backend_dtrel_excludes_plt): Define.
* elf32-vax.c (elf_vax_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Delete DT_RELASZ
and DT_RELA code.
(elf_backend_dtrel_excludes_plt): Define.
* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Delete
DT_RELASZ code.
(elf_backend_dtrel_excludes_plt): Define.
* elfnn-ia64.c (elfNN_ia64_finish_dynamic_sections): Delete DT_RELASZ
code.
(elf_backend_dtrel_excludes_plt): Define.
* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Delete
DT_RELASZ code.
* elfxx-sparc.c (sparc_finish_dyn): Delete DT_RELASZ code.
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We'd like to have the elf_link_hash_table srelplt field rather than
some private target field used to save short-cuts to a PLT relocation
section. This save a little space but mainly is so that the generic
ELF code can access the field. Ditto for other dynamic sections.
* elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts
to dynamic sections.
(mn10300_elf_final_link_relocate): Likewise.
(_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise.
(_bfd_mn10300_elf_size_dynamic_sections): Likewise.
(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
(_bfd_mn10300_elf_finish_dynamic_sections): Likewise.
* elf32-bfin.c (bfin_check_relocs): Likewise.
(bfin_relocate_section): Likewise.
(bfin_gc_sweep_hook): Likewise.
(struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt
and spltrel.
(bfinfdpic_got_section, bfinfdpic_gotrel_section,
bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf
shortcut sections.
(_bfin_create_got_section): Use elf htab shortcuts to dyn sections.
Delete dead code.
(bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections.
(bfin_size_dynamic_sections): Likewise.
* elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise.
(cr16_elf_check_relocs): Likewise.
(cr16_elf_final_link_relocate): Likewise.
(_bfd_cr16_elf_create_dynamic_sections): Likewise.
(_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
(_bfd_cr16_elf_size_dynamic_sections): Likewise.
(_bfd_cr16_elf_finish_dynamic_symbol): Likewise.
(_bfd_cr16_elf_finish_dynamic_sections): Likewise.
* elf32-cris.c (cris_elf_relocate_section): Likewise.
(elf_cris_finish_dynamic_symbol): Likewise.
(elf_cris_finish_dynamic_sections): Likewise.
(cris_elf_gc_sweep_hook): Likewise.
(elf_cris_adjust_gotplt_to_got): Likewise.
(elf_cris_adjust_dynamic_symbol): Likewise.
(cris_elf_check_relocs): Likewise. Delete dead code.
(elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic
sections.
(elf_cris_discard_excess_program_dynamics): Likewise.
* elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot,
sgotrel, splt and spltrel.
(frvfdpic_got_section, frvfdpic_gotrel_section,
frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf
shortcut sections.
(_frv_create_got_section): Likewise.
* elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot,
srelgot, splt and srelplt.
(hppa_build_one_stub): Use elf htab shortcuts to dynamic sections.
(elf32_hppa_create_dynamic_sections): Likewise.
(elf32_hppa_check_relocs): Likewise.
(allocate_plt_static): Likewise.
(allocate_dynrelocs): Likewise.
(elf32_hppa_size_dynamic_sections): Likewise.
(elf32_hppa_relocate_section): Likewise.
(elf32_hppa_finish_dynamic_symbol): Likewise.
(elf32_hppa_finish_dynamic_sections): Likewise.
* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
* elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelplt.
(lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf
shortcut sections.
(create_got_section): Delete. Use _bfd_elf_create_got_section instead.
(lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections.
(lm32_elf_check_relocs): Likewise.
(lm32_elf_finish_dynamic_sections): Likewise.
(lm32_elf_finish_dynamic_symbol): Likewise.
(allocate_dynrelocs): Likewise.
(lm32_elf_size_dynamic_sections): Likewise.
(lm32_elf_create_dynamic_sections): Likewise.
* elf32-m32c.c (m32c_elf_relocate_section): Likewise.
(m32c_elf_check_relocs): Likewise.
(m32c_elf_finish_dynamic_sections): Likewise.
(m32c_elf_always_size_sections): Likewise.
* elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelplt.
(create_got_section): Delete. Use _bfd_elf_create_got_section instead.
(m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
sections.
(allocate_dynrelocs): Likewise.
(m32r_elf_size_dynamic_sections): Likewise.
(m32r_elf_relocate_section): Likewise.
(m32r_elf_finish_dynamic_symbol): Likewise.
(m32r_elf_finish_dynamic_sections): Likewise.
(m32r_elf_check_relocs): Likewise.
* elf32-m68k.c (elf_m68k_partition_multi_got): Likewise.
(elf_m68k_check_relocs): Likewise.
(elf_m68k_adjust_dynamic_symbol): Likewise.
(elf_m68k_size_dynamic_sections): Likewise.
(elf_m68k_relocate_section): Likewise.
(elf_m68k_finish_dynamic_symbol): Likewise.
(elf_m68k_finish_dynamic_sections): Likewise.
* elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelplt.
(elf_metag_relocate_section): Use elf htab shortcuts to dynamic
sections.
(elf_metag_create_dynamic_sections): Likewise. Allocate got header
here in .got.
(elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections.
(allocate_dynrelocs): Likewise.
(elf_metag_size_dynamic_sections): Likewise.
(elf_metag_finish_dynamic_symbol): Likewise.
(elf_metag_finish_dynamic_sections): Likewise.
(elf_metag_size_stubs): Likewise.
(elf_backend_got_header_size): Don't define.
(elf_backend_want_got_plt): Define.
* elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelpl.
(microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic
sections.
(create_got_section): Delete. Use _bfd_elf_create_got_section instead.
(microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections.
(microblaze_elf_create_dynamic_sections): Likewise.
(allocate_dynrelocs): Likewise.
(microblaze_elf_size_dynamic_sections): Likewise.
(microblaze_elf_finish_dynamic_symbol): Likewise.
(microblaze_elf_finish_dynamic_sections): Likewise.
* elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL
already zero fields.
(create_got_section): Delete. Use _bfd_elf_create_got_section instead.
(nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
sections.
(allocate_dynrelocs): Likewise.
(nds32_elf_size_dynamic_sections): Likewise.
(nds32_elf_relocate_section): Likewise.
(nds32_elf_finish_dynamic_symbol): Likewise.
(nds32_elf_finish_dynamic_sections): Likewise.
(nds32_elf_check_relocs): Likewise.
(calculate_plt_memory_address): Likewise.
(calculate_got_memory_address): Likewise.
* elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelplt.
* elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise.
(or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections.
(create_got_section): Delete. Use _bfd_elf_create_got_section instead.
(or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections.
(or1k_elf_finish_dynamic_sections): Likewise.
(or1k_elf_finish_dynamic_symbol): Likewise.
(allocate_dynrelocs): Likewise.
(or1k_elf_size_dynamic_sections): Likewise.
(or1k_elf_create_dynamic_sections): Likewise.
* elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot,
plt, relplt, iplt, reliplt and sgotplt.
(ppc_elf_create_got): Use elf htab shortcuts to dynamic sections.
(ppc_elf_create_glink): Likewise.
(ppc_elf_create_dynamic_sections): Likewise.
(ppc_elf_check_relocs): Likewise.
(ppc_elf_select_plt_layout): Likewise.
(ppc_elf_tls_setup): Likewise.
(allocate_got): Likewise.
(allocate_dynrelocs): Likewise.
(ppc_elf_size_dynamic_sections): Likewise.
(ppc_elf_relax_section): Likewise.
(ppc_elf_relocate_section): Likewise.
(ppc_elf_finish_dynamic_symbol): Likewise.
(ppc_elf_reloc_type_class): Likewise.
(ppc_elf_finish_dynamic_sections): Likewise.
* elf32-rl78.c (rl78_elf_relocate_section): Likewise.
(rl78_elf_check_relocs): Likewise.
(rl78_elf_finish_dynamic_sections): Likewise.
(rl78_elf_always_size_sections): Likewise.
* elf32-s390.c (create_got_section): Delete.
(elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section.
(elf_s390_check_relocs): Likewise.
* elf32-score.c (score_elf_create_got_section): Set elf shortcuts.
(s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts.
* elf32-score7.c (score_elf_create_got_section): As above.
(s7_bfd_score_elf_finish_dynamic_sections): As above.
* elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelplt.
(create_got_section): Don't set them.
(sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic
sections.
(allocate_dynrelocs): Likewise.
(sh_elf_size_dynamic_sections): Likewise.
(sh_elf_add_rofixup): Likewise.
(sh_elf_relocate_section): Likewise.
(sh_elf_check_relocs): Likewise.
(sh_elf_finish_dynamic_symbol): Likewise.
(sh_elf_finish_dynamic_sections): Likewise.
* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_create_got_section): Likewise.
* elf32-vax.c (elf_vax_check_relocs): Likewise.
(elf_vax_adjust_dynamic_symbol): Likewise.
(elf_vax_always_size_sections): Likewise.
(elf_vax_instantiate_got_entries): Likewise.
(elf_vax_relocate_section): Likewise.
(elf_vax_finish_dynamic_symbol): Likewise.
(elf_vax_finish_dynamic_sections): Likewise.
* elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise.
(xstormy16_elf_always_size_sections): Likewise.
(xstormy16_elf_relocate_section): Likewise.
(xstormy16_elf_finish_dynamic_sections): Likewise.
* elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot,
sgotplt, srelgot, splt and srelplt.
(elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to
dynamic sections.
(elf_xtensa_allocate_dynrelocs): Likewise.
(elf_xtensa_allocate_local_got_size): Likewise.
(elf_xtensa_size_dynamic_sections): Likewise.
(elf_xtensa_relocate_section): Likewise.
(elf_xtensa_finish_dynamic_sections): Likewise.
(shrink_dynamic_reloc_sections): Likewise.
(elf_xtensa_get_plt_section): Likewise.
(elf_xtensa_get_gotplt_section): Likewise.
(xtensa_callback_required_dependence): Likewise.
* elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab
shortcuts to dynamic sections.
(elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to
dynamic sections.
(elf64_alpha_size_plt_section): Likewise.
(elf64_alpha_size_rela_got_1): Likewise.
(elf64_alpha_size_rela_got_section): Likewise.
(elf64_alpha_relocate_section): Likewise.
(elf64_alpha_finish_dynamic_symbol): Likewise.
(elf64_alpha_finish_dynamic_sections): Likewise.
* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
* elf64-s390.c (create_got_section): Delete.
(elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section.
(elf_s390_check_relocs): Likewise.
* elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to
dynamic sections.
(sh_elf64_check_relocs): Likewise.
(sh64_elf64_adjust_dynamic_symbol): Likewise.
(sh64_elf64_size_dynamic_sections): Likewise.
(sh64_elf64_finish_dynamic_symbol): Likewise.
(sh64_elf64_finish_dynamic_sections): Likewise.
* elflink.c (_bfd_elf_create_got_section): Likewise.
* elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise.
* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
(elfNN_ia64_finish_dynamic_sections): Likewise.
* elfnn-riscv.c (riscv_elf_create_got_section): Likewise.
* elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt,
sgotplt, splt and sgot.
(mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic
sections.
(mips_elf_gotplt_index): Likewise.
(mips_elf_primary_global_got_index): Likewise.
(mips_elf_global_got_index): Likewise.
(mips_elf_got_offset_from_index): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_create_got_section): Likewise.
(mips_elf_calculate_relocation): Likewise.
(_bfd_mips_elf_create_dynamic_sections): Likewise.
(_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
(mips_elf_lay_out_got): Likewise.
(mips_elf_set_plt_sym_value): Likewise.
(_bfd_mips_elf_size_dynamic_sections): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(mips_finish_exec_plt): Likewise.
(mips_vxworks_finish_exec_plt): Likewise.
(mips_vxworks_finish_shared_plt): Likewise.
(_bfd_mips_elf_finish_dynamic_sections): Likewise.
* elfxx-sparc.c (sparc_finish_dyn): Likewise.
* elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
|
|
bfd/
* elfxx-mips.c (STUB_JALR): Correct description.
|
|
formatting token.
* aout-adobe.c: Add missing c-format tags for translatable strings.
* aout-cris.c: Likewise.
* aoutx.h: Likewise.
* bfd.c: Likewise.
* binary.c: Likewise.
* cache.c: Likewise.
* coff-alpha.c: Likewise.
* coff-arm.c: Likewise.
* coff-i860.c: Likewise.
* coff-mcore.c: Likewise.
* coff-ppc.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-sh.c: Likewise.
* coff-tic4x.c: Likewise.
* coff-tic54x.c: Likewise.
* coff-tic80.c: Likewise.
* coff64-rs6000.c: Likewise.
* coffcode.h: Likewise.
* coffgen.c: Likewise.
* cofflink.c: Likewise.
* coffswap.h: Likewise.
* cpu-arm.c: Likewise.
* dwarf2.c: Likewise.
* ecoff.c: Likewise.
* elf-attrs.c: Likewise.
* elf-eh-frame.c: Likewise.
* elf-ifunc.c: Likewise.
* elf-m10300.c: Likewise.
* elf-s390-common.c: Likewise.
* elf.c: Likewise.
* elf32-arc.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-avr.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-cr16.c: Likewise.
* elf32-cr16c.c: Likewise.
* elf32-cris.c: Likewise.
* elf32-crx.c: Likewise.
* elf32-d10v.c: Likewise.
* elf32-d30v.c: Likewise.
* elf32-epiphany.c: Likewise.
* elf32-fr30.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-gen.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-i370.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-i960.c: Likewise.
* elf32-ip2k.c: Likewise.
* elf32-iq2000.c: Likewise.
* elf32-lm32.c: Likewise.
* elf32-m32c.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-m68hc11.c: Likewise.
* elf32-m68hc12.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-m68k.c: Likewise.
* elf32-mcore.c: Likewise.
* elf32-mep.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-moxie.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-mt.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-nios2.c: Likewise.
* elf32-or1k.c: Likewise.
* elf32-pj.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf32-sh-symbian.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-sh64.c: Likewise.
* elf32-spu.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf32-tilepro.c: Likewise.
* elf32-v850.c: Likewise.
* elf32-vax.c: Likewise.
* elf32-visium.c: Likewise.
* elf32-xgate.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-gen.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-sh64.c: Likewise.
* elf64-sparc.c: Likewise.
* elf64-x86-64.c: Likewise.
* elfcode.h: Likewise.
* elfcore.h: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elfxx-sparc.c: Likewise.
* elfxx-tilegx.c: Likewise.
* ieee.c: Likewise.
* ihex.c: Likewise.
* libbfd.c: Likewise.
* linker.c: Likewise.
* m68klinux.c: Likewise.
* mach-o.c: Likewise.
* merge.c: Likewise.
* mmo.c: Likewise.
* oasys.c: Likewise.
* pdp11.c: Likewise.
* pe-mips.c: Likewise.
* peXXigen.c: Likewise.
* pei-x86_64.c: Likewise.
* peicode.h: Likewise.
* ppcboot.c: Likewise.
* reloc.c: Likewise.
* sparclinux.c: Likewise.
* srec.c: Likewise.
* stabs.c: Likewise.
* vms-alpha.c: Likewise.
* vms-lib.c: Likewise.
* xcofflink.c: Likewise.
|
|
See https://sourceware.org/ml/binutils/2016-07/msg00091.html
This patch stop --gc-sections elf_gc_sweep_symbol localizing symbols
that ought to remain global.
The difficulty with always descending into output section statements
is that symbols defined by the script in such statements don't have
a bfd section when lang_do_assignments runs early in the link process.
There are two approaches to curing this problem. Either we can
create the bfd section early, or we can use a special section. This
patch takes the latter approach and uses bfd_und_section. (Creating
bfd sections early results in changed output section order, and thus
lots of testsuite failures. You can't create all output sections
early to ensure proper ordering as KEEP then stops empty sections
from being stripped.)
The wrinkle with this approach is that some code that runs at
gc-sections time needs to be made aware of the odd defined symbols
using bfd_und_section.
bfd/
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Handle symbols
defined temporarily with bfd_und_section.
* elflink.c (_bfd_elf_gc_keep): Don't set SEC_KEEP for bfd_und_section.
* elfxx-mips.c (mips_elf_local_pic_function_p): Exclude defined
symbols with bfd_und_section.
ld/
* ldlang.c (lang_do_assignments_1): Descend into output section
statements that do not yet have bfd sections. Set symbol section
temporarily for symbols defined in such statements to the undefined
section. Don't error on data or reloc statements until final phase.
* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
in expld.section.
* testsuite/ld-mmix/bpo-10.d: Adjust.
* testsuite/ld-mmix/bpo-11.d: Adjust.
|
|
Most BFD linker functions take a bfd_link_info param, which reinforces
the fact that they are linker functions and allow access to linker
callbacks, eg. einfo for printing errors. I was going to use einfo
for --fatal-warnings support before I decided a better way was the
patch commit 4519d071.
bfd/
* targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace
obfd param with struct bfd_link_info param. Update all callers.
* linker.c (bfd_merge_private_bfd_data): Likewise.
(_bfd_generic_verify_endian_match): Likewise.
* aoutf1.h (sunos_merge_private_bfd_data): Likewise.
* coff-arm.c (coff_arm_merge_private_bfd_data): Likewise.
* elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise.
* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise.
(_bfd_elf_merge_object_attributes): Likewise.
* elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise.
* elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise.
* elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise.
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise.
(elf32_arm_merge_private_bfd_data): Likewise.
* elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise.
* elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise.
* elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise.
* elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise.
* elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise.
* elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise.
* elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise.
* elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise.
* elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise.
* elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
* elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise.
* elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise.
* elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise.
* elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise.
* elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise.
(elf32_msp430_merge_private_bfd_data): Likewise.
* elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise.
* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise.
* elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise.
* elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise.
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise.
(ppc_elf_merge_obj_attributes): Likewise.
(ppc_elf_merge_private_bfd_data): Likewise.
* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise.
* elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise.
* elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise.
* elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise.
(elf32_score_merge_private_bfd_data): Likewise.
* elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise.
* elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise.
* elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise.
* elf32-sh64.c (sh64_elf_merge_private_data): Likewise.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise.
* elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise.
(elf32_tic6x_merge_private_bfd_data): Likewise.
* elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise.
* elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise.
* elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise.
* elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise.
* elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise.
* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise.
* elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise.
* elf64-sh64.c (sh_elf64_merge_private_data): Likewise.
* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise.
* elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise.
* elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise.
(mips_elf_merge_obj_attributes): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Likewise.
* elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
* elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise.
* elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise.
* elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
* elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise.
* libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
ld/
* ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
|
|
Comment changes.
bfd/
* coff-h8300.c: Spell fall through comments consistently.
* coffgen.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-score.c: Likewise.
* elf32-score7.c: Likewise.
* elf64-ppc.c: Likewise.
* elfxx-aarch64.c: Likewise.
* elfxx-mips.c: Likewise.
* cpu-ns32k.c: Add missing fall through comments.
* elf-m10300.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-avr.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-microblaze.c: Likewise.
* elf32-nds32.c: Likewise.
* elf32-ppc.c: Likewise.
* elf32-rl78.c: Likewise.
* elf32-rx.c: Likewise.
* elf32-s390.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-tic6x.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-s390.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* ieee.c: Likewise.
* oasys.c: Likewise.
* pdp11.c: Likewise.
* srec.c: Likewise.
* versados.c: Likewise.
opcodes/
* aarch64-opc.c: Spell fall through comments consistently.
* i386-dis.c: Likewise.
* aarch64-dis.c: Add missing fall through comments.
* aarch64-opc.c: Likewise.
* arc-dis.c: Likewise.
* arm-dis.c: Likewise.
* i386-dis.c: Likewise.
* m68k-dis.c: Likewise.
* mep-asm.c: Likewise.
* ns32k-dis.c: Likewise.
* sh-dis.c: Likewise.
* tic4x-dis.c: Likewise.
* tic6x-dis.c: Likewise.
* vax-dis.c: Likewise.
binutils/
* dlltool.c: Spell fall through comments consistently.
* objcopy.c: Likewise.
* readelf.c: Likewise.
* dwarf.c: Add missing fall through comments.
* elfcomm.c: Likewise.
* sysinfo.y: Likewise.
* readelf.c: Likewise. Also remove extraneous comments.
gas/
* app.c: Add missing fall through comments.
* dw2gencfi.c: Likewise.
* expr.c: Likewise.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-crx.c: Likewise.
* config/tc-dlx.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-rx.c: Likewise.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* config/obj-elf.c: Likewise.
* config/tc-i386.c: Likewise.
* depend.c: Spell fall through comments consistently.
* config/tc-arm.c: Likewise.
* config/tc-d10v.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-visium.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z8k.c: Likewise.
gprof/
* gprof.c: Add missing fall through comments.
ld/
* lexsup.c: Spell fall through comments consistently and add
missing fall through comments.
|
|
Now that _bfd_error_handler is not a function pointer.
* aout-adobe.c: Replace (*_bfd_error_handler) (...) with
_bfd_error_handler (...) throughout.
* aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c,
* cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c,
* coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c,
* coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
* coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c,
* ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c,
* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
* elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c,
* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c,
* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c,
* elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
* elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c,
* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c,
* elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c,
* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c,
* elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c,
* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
* elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c,
* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c,
* elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c,
* ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c,
* mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c,
* pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c,
* rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c,
* stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c,
* xcofflink.c: Likewise.
|
|
For the case where a function which requires an LA25 stub is at the
beginning of a section we use a short sequence comprised of a LUI/ADDIU
instruction pair only and prepended to the associated function rather
than using a trailing jump to reach the function. This works by
checking for the offset into section of the function symbol being 0.
This is however never the case for microMIPS function symbols, which
have the ISA bit set. Consequently the short LA25 sequence is never
produced for microMIPS functions, like with the following example:
$ cat la25a.s
.abicalls
.global f1
.ent f1
f1:
.set noreorder
.cpload $25
.set reorder
.option pic0
jal f2
.option pic2
jr $31
.end f1
.global f2
.ent f2
f2:
jr $31
.end f2
$ cat la25b.s
.abicalls
.option pic0
.global __start
.ent __start
__start:
jal f1
jal f2
.end __start
$ as -mmicromips -32 -EB -o la25a.o la25a.s
$ as -mmicromips -32 -EB -o la25b.o la25b.s
$ ld -melf32btsmip -o la25 la25a.o la25b.o
$ objdump -d la25
la25: file format elf32-tradbigmips
Disassembly of section .text:
004000d0 <.pic.f2>:
4000d0: 41b9 0040 lui t9,0x40
4000d4: d420 0083 j 400106 <f2>
4000d8: 3339 0107 addiu t9,t9,263
4000dc: 0000 0000 nop
004000e0 <.pic.f1>:
4000e0: 41b9 0040 lui t9,0x40
4000e4: d420 0078 j 4000f0 <f1>
4000e8: 3339 00f1 addiu t9,t9,241
4000ec: 0000 0000 nop
004000f0 <f1>:
4000f0: 41bc 0002 lui gp,0x2
4000f4: 339c 801f addiu gp,gp,-32737
4000f8: 033c e150 addu gp,gp,t9
4000fc: f420 0083 jal 400106 <f2>
400100: 0000 0000 nop
400104: 45bf jrc ra
00400106 <f2>:
400106: 45bf jrc ra
...
00400110 <__start>:
400110: f420 0070 jal 4000e0 <.pic.f1>
400114: 0000 0000 nop
400118: f420 0068 jal 4000d0 <.pic.f2>
40011c: 0000 0000 nop
$
where `.pic.f1' could omit the trailing jump and the filler NOP and just
fall through to `f1'.
Correct the problem by masking out the ISA bit from microMIPS functions,
which fixes the earlier example:
$ objdump -d la25
la25: file format elf32-tradbigmips
Disassembly of section .text:
004000d0 <.pic.f2>:
4000d0: 41b9 0040 lui t9,0x40
4000d4: d420 0083 j 400106 <f2>
4000d8: 3339 0107 addiu t9,t9,263
...
004000e8 <.pic.f1>:
4000e8: 41b9 0040 lui t9,0x40
4000ec: 3339 00f1 addiu t9,t9,241
004000f0 <f1>:
4000f0: 41bc 0002 lui gp,0x2
4000f4: 339c 801f addiu gp,gp,-32737
4000f8: 033c e150 addu gp,gp,t9
4000fc: f420 0083 jal 400106 <f2>
400100: 0000 0000 nop
400104: 45bf jrc ra
00400106 <f2>:
400106: 45bf jrc ra
...
00400110 <__start>:
400110: f420 0074 jal 4000e8 <.pic.f1>
400114: 0000 0000 nop
400118: f420 0068 jal 4000d0 <.pic.f2>
40011c: 0000 0000 nop
$
There is no need to do anything for MIPS16 functions, because if any
LA25 stub has been generated for such a function, then it is only
required for an associated call thunk only, which is regular MIPS code
and the address of which, with the ISA bit clear, is returned by
`mips_elf_get_la25_target'.
This problem has been there since the beginning of microMIPS support:
commit df58fc944dbc6d5efd8d3826241b64b6af22f447
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Sun Jul 24 14:20:15 2011 +0000
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS:
microMIPS ASE support").
bfd/
* elfxx-mips.c (mips_elf_add_la25_stub): Clear the ISA bit of
the stub address retrieved if associated with a microMIPS
function.
|
|
Fix a problem with missing microMIPS symbol annotation with microMIPS
LA25 stub symbols. The consequence of the issue is these symbols appear
in the symbol table as regular MIPS symbols with the ISA bit set, as
shown with the example below:
$ cat la25a.s
.abicalls
.global f1
.ent f1
f1:
.set noreorder
.cpload $25
.set reorder
.option pic0
jal f2
.option pic2
jr $31
.end f1
.global f2
.ent f2
f2:
jr $31
.end f2
$ cat la25b.s
.abicalls
.option pic0
.global __start
.ent __start
__start:
jal f1
jal f2
.end __start
$ as -mmicromips -32 -EB -o la25a.o la25a.s
$ as -mmicromips -32 -EB -o la25b.o la25b.s
$ ld -melf32btsmip -o la25 la25a.o la25b.o
$ readelf -s la25
Symbol table '.symtab' contains 18 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00400098 0 SECTION LOCAL DEFAULT 1
2: 004000b0 0 SECTION LOCAL DEFAULT 2
3: 004000d0 0 SECTION LOCAL DEFAULT 3
4: 00000000 0 SECTION LOCAL DEFAULT 4
5: 00000000 0 SECTION LOCAL DEFAULT 5
6: 00418110 0 NOTYPE LOCAL DEFAULT 3 _gp
7: 004000e1 16 FUNC LOCAL DEFAULT 3 .pic.f1
8: 004000d1 16 FUNC LOCAL DEFAULT 3 .pic.f2
9: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fdata
10: 00400110 16 FUNC GLOBAL DEFAULT [MICROMIPS] 3 __start
11: 00400106 2 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f2
12: 004000d0 0 NOTYPE GLOBAL DEFAULT 3 _ftext
13: 00410120 0 NOTYPE GLOBAL DEFAULT 3 __bss_start
14: 004000f0 22 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f1
15: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _edata
16: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _end
17: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fbss
$
where microMIPS annotation is missing for `.pic.f1' and `.pic.f2' even
though these stubs are associated with microMIPS functions `f1' and `f2'
respectively.
Add the missing annotation then, by copying it from the function symbol
an LA25 stub is associated with, correcting the example above:
$ readelf -s la25
Symbol table '.symtab' contains 18 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00400098 0 SECTION LOCAL DEFAULT 1
2: 004000b0 0 SECTION LOCAL DEFAULT 2
3: 004000d0 0 SECTION LOCAL DEFAULT 3
4: 00000000 0 SECTION LOCAL DEFAULT 4
5: 00000000 0 SECTION LOCAL DEFAULT 5
6: 00418110 0 NOTYPE LOCAL DEFAULT 3 _gp
7: 004000e0 16 FUNC LOCAL DEFAULT [MICROMIPS] 3 .pic.f1
8: 004000d0 16 FUNC LOCAL DEFAULT [MICROMIPS] 3 .pic.f2
9: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fdata
10: 00400110 16 FUNC GLOBAL DEFAULT [MICROMIPS] 3 __start
11: 00400106 2 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f2
12: 004000d0 0 NOTYPE GLOBAL DEFAULT 3 _ftext
13: 00410120 0 NOTYPE GLOBAL DEFAULT 3 __bss_start
14: 004000f0 22 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f1
15: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _edata
16: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _end
17: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fbss
$
This problem has been there since the beginning of microMIPS support:
commit df58fc944dbc6d5efd8d3826241b64b6af22f447
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Sun Jul 24 14:20:15 2011 +0000
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS:
microMIPS ASE support").
bfd/
* elfxx-mips.c (mips_elf_create_stub_symbol): For a microMIPS
stub also add STO_MICROMIPS annotation.
|
|
Fix a linker regression introduced with commit 9d862524f6ae ("MIPS:
Verify the ISA mode and alignment of branch and jump targets") causing a
build failure in microMIPS glibc where the `zdump' tool fails to link:
.../timezone/zdump.o: In function `yeartot':
.../timezone/zdump.c:758:(.text+0x62): Jump to a non-instruction-aligned address
.../timezone/zdump.c:758:(.text+0x76): Jump to a non-instruction-aligned address
.../timezone/zdump.c:768:(.text+0x112): Jump to a non-instruction-aligned address
.../timezone/zdump.c:774:(.text+0x1b8): Jump to a non-instruction-aligned address
.../timezone/zdump.c:774:(.text+0x1cc): Jump to a non-instruction-aligned address
collect2: error: ld returned 1 exit status
make[2]: *** [.../timezone/zdump] Error 1
The cause of the failure is the stricter check introduced with the said
change for jump and branch targets tripping on the address of microMIPS
LA25 stubs. Despite being microMIPS code these stubs do not have the
ISA bit set throughout the relocation calculation process, because they
have their address set to the memory offset into the stub section they
are placed in.
The `mips_elf_la25_stub' structure does not carry ISA mode information,
but there is no need to extend it, because the ISA mode can be inferred
from the original symbol, which will have STO_MICROMIPS annotation, so
use that instead to set the ISA bit appropriately. Also only LA25 stubs
associated with microMIPS symbols need to have the ISA bit set, because
other LA25 stubs are made with regular MIPS code, even if associated
with a MIPS16 symbol (in which case they are needed by a call thunk only
rather than the MIPS16 function proper).
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Set the ISA bit
in microMIPS LA25 stub references.
|
|
Complement:
commit 1bbce132647e6d72aaa065cce5c1d5dd6585c2b2
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date: Mon Jun 24 23:55:46 2013 +0000
<https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS:
Compressed PLT/stubs support"), and also choose between regular and
compressed PLT entries as appropriate for any branches referring.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
in PLT compression selection.
(_bfd_mips_elf_check_relocs): Likewise.
ld/
* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
|
|
Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX,
similarly to how JAL instructions are converted.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
BAL to JALX.
(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
corresponding error message.
gas/
* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
Adjust comments for BAL to JALX linker conversion.
(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
expected.
* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
* testsuite/gas/mips/branch-local-4.d: New test.
* testsuite/gas/mips/branch-local-n32-4.d: New test.
* testsuite/gas/mips/branch-local-n64-4.d: New test.
* testsuite/gas/mips/branch-addend.d: New test.
* testsuite/gas/mips/branch-addend-n32.d: New test.
* testsuite/gas/mips/branch-addend-n64.d: New test.
* testsuite/gas/mips/branch-local-4.s: New test source.
* testsuite/gas/mips/branch-addend.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
messages expected.
* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
source.
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
|
|
Verify that the ISA mode of branch targets is the same as the referring
relocation, so that an attempt to produce a branch between instructions
encoded in different ISA modes each causes an error rather than silently
producing non-functional code. Make sure that no symbol or addend bits
are silently truncated: terminate with an error if the relocation value
calculated cannot be encoded in the relocatable field of a branch; for
REL targets also applying to any intermediate addend.
Also make jump target's alignment verification consistent with that for
branches.
This change will require an update to some obscure handcoded assembly
sources which make branches to labels placed at data objects, however
for microMIPS code only. These labels will have to be updated with the
`.insn' directive for containing code to assemble and link successfully.
Such code is broken as any such labels have always been required by the
microMIPS architecture specification[1][2] to be annotated this way for
correct interpretation, and with our old code missing `.insn' directives
caused labels to present different semantics depending on whether they
were referred with branch (ISA bit ignored) or other relocations (ISA
bit respected).
Enforcing these checks however will ensure errors in building software,
like mixed regular MIPS and microMIPS code links with branches between,
will be diagnosed at the build time rather than causing odd run-time
errors such as intermittent crashes. It will also let cross-mode BAL
instructions be converted to JALX instructions, with a separate change.
References:
[1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 7.1 "Assembly-Level
Compatibility", p. 533
[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 8.1 "Assembly-Level
Compatibility", p. 623
bfd/
* elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1,
R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1.
(branch_reloc_p): New function.
(mips_elf_calculate_relocation): Handle ISA mode determination
for relocations against section symbols, against absolute
symbols and absolute relocations. Also set `*cross_mode_jump_p'
for branches.
<R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment
checks for weak undefined symbols. Also check target alignment
within the same ISA mode.
<R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches
in the alignment check.
<R_MICROMIPS_PC7_S1>: Add an alignment check.
<R_MICROMIPS_PC10_S1>: Likewise.
<R_MICROMIPS_PC16_S1>: Likewise.
(mips_elf_perform_relocation): Report a failure for unsupported
same-mode JALX instructions and cross-mode branches.
(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add
error messages for jumps to misaligned addresses.
gas/
* config/tc-mips.c (mips_force_relocation): Also retain branch
relocations against MIPS16 and microMIPS symbols.
(fix_bad_cross_mode_jump_p): New function.
(fix_bad_same_mode_jalx_p): Likewise.
(fix_bad_misaligned_jump_p): Likewise.
(fix_bad_cross_mode_branch_p): Likewise.
(fix_bad_misaligned_branch_p): Likewise.
(fix_validate_branch): Likewise.
(md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP>
<BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5,
etc. Verify the ISA mode and alignment of the jump target.
<BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check
with a call to `fix_validate_branch'.
<BFD_RELOC_MIPS_26_PCREL_S2>: Likewise.
<BFD_RELOC_16_PCREL_S2>: Likewise.
<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend.
Verify the ISA mode and alignment of the branch target.
(md_convert_frag): Verify the ISA mode and alignment of resolved
MIPS16 branch targets.
* testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction
branch targets with `.insn'.
* testsuite/gas/mips/branch-misc-5.s: Likewise.
* testsuite/gas/mips/micromips@branch-misc-5-64.d: Update
accordingly.
* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
* testsuite/gas/mips/micromips-branch-relax.s: Annotate
non-instruction branch target with `.insn'.
* testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets
with external symbols.
* testsuite/gas/mips/micromips-insn32.d: Update accordingly.
* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* testsuite/gas/mips/micromips-trap.d: Likewise.
* testsuite/gas/mips/micromips.d: Likewise.
* testsuite/gas/mips/mips16.s: Annotate non-instruction branch
targets with `.insn'.
* testsuite/gas/mips/mips16.d: Update accordingly.
* testsuite/gas/mips/mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction
branch target with `.insn'.
* testsuite/gas/mips/relax-swap3.s: Likewise.
* testsuite/gas/mips/branch-local-2.l: New list test.
* testsuite/gas/mips/branch-local-3.l: New list test.
* testsuite/gas/mips/branch-local-n32-2.l: New list test.
* testsuite/gas/mips/branch-local-n32-3.l: New list test.
* testsuite/gas/mips/branch-local-n64-2.l: New list test.
* testsuite/gas/mips/branch-local-n64-3.l: New list test.
* testsuite/gas/mips/unaligned-jump-1.l: New list test.
* testsuite/gas/mips/unaligned-jump-2.l: New list test.
* testsuite/gas/mips/unaligned-jump-3.d: New test.
* testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test.
* testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test.
* testsuite/gas/mips/unaligned-jump-mips16-3.d: New test.
* testsuite/gas/mips/unaligned-jump-micromips-1.l: New list
test.
* testsuite/gas/mips/unaligned-jump-micromips-2.l: New list
test.
* testsuite/gas/mips/unaligned-jump-micromips-3.d: New test.
* testsuite/gas/mips/unaligned-branch-1.l: New list test.
* testsuite/gas/mips/unaligned-branch-2.l: New list test.
* testsuite/gas/mips/unaligned-branch-3.d: New test.
* testsuite/gas/mips/unaligned-branch-r6-1.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-2.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-3.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-4.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-5.d: New test.
* testsuite/gas/mips/unaligned-branch-r6-6.d: New test.
* testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test.
* testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test.
* testsuite/gas/mips/unaligned-branch-mips16-3.d: New test.
* testsuite/gas/mips/unaligned-branch-micromips-1.l: New list
test.
* testsuite/gas/mips/unaligned-branch-micromips-2.l: New list
test.
* testsuite/gas/mips/unaligned-branch-micromips-3.d: New test.
* testsuite/gas/mips/branch-local-2.s: New test source.
* testsuite/gas/mips/branch-local-3.s: New test source.
* testsuite/gas/mips/branch-local-n32-2.s: New test source.
* testsuite/gas/mips/branch-local-n32-3.s: New test source.
* testsuite/gas/mips/branch-local-n64-2.s: New test source.
* testsuite/gas/mips/branch-local-n64-3.s: New test source.
* testsuite/gas/mips/unaligned-jump-1.s: New test source.
* testsuite/gas/mips/unaligned-jump-2.s: New test source.
* testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source.
* testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source.
* testsuite/gas/mips/unaligned-jump-micromips-1.s: New test
source.
* testsuite/gas/mips/unaligned-jump-micromips-2.s: New test
source.
* testsuite/gas/mips/unaligned-branch-1.s: New test source.
* testsuite/gas/mips/unaligned-branch-2.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-1.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-2.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-3.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-4.s: New test source.
* testsuite/gas/mips/unaligned-branch-mips16-1.s: New test
source.
* testsuite/gas/mips/unaligned-branch-mips16-2.s: New test
source.
* testsuite/gas/mips/unaligned-branch-micromips-1.s: New test
source.
* testsuite/gas/mips/unaligned-branch-micromips-2.s: New test
source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message
expected.
* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
* testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps,
microMIPS BAL and MIPS16 instructions.
* testsuite/ld-mips-elf/undefweak-overflow.d: Update
accordingly.
* testsuite/ld-mips-elf/unaligned-branch-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test.
* testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test.
* testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test.
* testsuite/ld-mips-elf/unaligned-jump.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
|
|
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1'
and the usual MIPS16 bit shuffling applies to relocated field handling,
as per the encoding of the branch target in the extended form of the
MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions.
include/
* elf/mips.h (R_MIPS16_PC16_S1): New relocation.
bfd/
* elf32-mips.c (elf_mips16_howto_table_rel): Add
R_MIPS16_PC16_S1.
(mips16_reloc_map): Likewise.
* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
(mips16_elf64_howto_table_rela): Likewise.
(mips16_reloc_map): Likewise.
* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
(elf_mips16_howto_table_rela): Likewise.
(mips16_reloc_map): Likewise.
* elfxx-mips.c (mips16_branch_reloc_p): New function.
(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
(b_reloc_p): Likewise.
(mips_elf_calculate_relocation): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-mips.c (mips16_reloc_p): Handle
BFD_RELOC_MIPS16_16_PCREL_S1.
(b_reloc_p): Likewise.
(limited_pcrel_reloc_p): Likewise.
(md_pcrel_from): Likewise.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise.
(md_convert_frag): Likewise.
(mips_fix_adjustable): Update comment.
* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
output, add dump patterns.
* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
implicit instruction padding, avoid MIPS16 JR->JRC conversion.
* testsuite/gas/mips/branch-weak-6.d: New test.
* testsuite/gas/mips/branch-weak-7.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
* testsuite/ld-mips-elf/mips16-branch.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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