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authorMichael Eager <eager@eagercon.com>2012-11-14 16:45:01 +0000
committerMichael Eager <eager@eagercon.com>2012-11-14 16:45:01 +0000
commited8ec0ec784e7e2fd114f4a14e2751add8942c9c (patch)
tree11fce8287dec411cd3ceba1644754e990171801d /opcodes/microblaze-opc.h
parente692c2171ead6cdd096e625d6e8a4dd33d8bffe2 (diff)
Add clz opcode.
opcodes/ * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn * microblaze-opcm.h (microblaze_instr): add clz gas/testsuite/ * gas/microblaze/allinsn.s: Add clz insn * gas/microblaze/allinsn.d: Likewise
Diffstat (limited to 'opcodes/microblaze-opc.h')
-rw-r--r--opcodes/microblaze-opc.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
index 44c9d38715..132b951465 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -96,7 +96,7 @@
#define DELAY_SLOT 1
#define NO_DELAY_SLOT 0
-#define MAX_OPCODES 284
+#define MAX_OPCODES 285
struct op_code_struct
{
@@ -394,6 +394,7 @@ struct op_code_struct
{"tneaputd", INST_TYPE_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0006E0, OPCODE_MASK_H34C, tneaputd, anyware_inst },
{"necaputd", INST_TYPE_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C000760, OPCODE_MASK_H34C, necaputd, anyware_inst },
{"tnecaputd", INST_TYPE_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x4C0007E0, OPCODE_MASK_H34C, tnecaputd, anyware_inst },
+ {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst },
{"", 0, 0, 0, 0, 0, 0, 0, 0},
};