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| author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-08 22:51:44 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-08 23:21:23 +0000 |
| commit | 329d01f70ea6367a9593c9b31e268c06dd729ec9 (patch) | |
| tree | ca14dec75e027a21e3a6ebd83ea6f09405c79841 /opcodes/aarch64-asm.c | |
| parent | 3a2488dd21a895df3ffb49048f5de1a83ce2ddd4 (diff) | |
AArch64/opcodes: Correct another `index' global shadowing error
Fix a commit c2c4ff8d52a2 ("[AArch64] Add ARMv8.3 FCMLA and FCADD
instructions") build regression:
cc1: warnings being treated as errors
.../opcodes/aarch64-dis.c: In function 'aarch64_ext_sve_addr_rr_lsl':
.../opcodes/aarch64-dis.c:1324: error: declaration of 'index' shadows a global declaration
/usr/include/string.h:303: error: shadowed declaration is here
make[4]: *** [aarch64-asm.lo] Error 1
in a way following commit 91d6fa6a035c ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").
opcodes/
* aarch64-asm.c (aarch64_ins_reglane): Rename `index' local
variable to `reglane_index'.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index cfe663087c..6d7072c5bb 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -125,28 +125,28 @@ aarch64_ins_reglane (const aarch64_operand *self, const aarch64_opnd_info *info, { /* index for e.g. SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>] or SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]. */ - unsigned index = info->reglane.index; + unsigned reglane_index = info->reglane.index; if (inst->opcode->op == OP_FCMLA_ELEM) /* Complex operand takes two elements. */ - index *= 2; + reglane_index *= 2; switch (info->qualifier) { case AARCH64_OPND_QLF_S_H: /* H:L:M */ - assert (index < 8); - insert_fields (code, index, 0, 3, FLD_M, FLD_L, FLD_H); + assert (reglane_index < 8); + insert_fields (code, reglane_index, 0, 3, FLD_M, FLD_L, FLD_H); break; case AARCH64_OPND_QLF_S_S: /* H:L */ - assert (index < 4); - insert_fields (code, index, 0, 2, FLD_L, FLD_H); + assert (reglane_index < 4); + insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H); break; case AARCH64_OPND_QLF_S_D: /* H */ - assert (index < 2); - insert_field (FLD_H, code, index, 0); + assert (reglane_index < 2); + insert_field (FLD_H, code, reglane_index, 0); break; default: assert (0); |