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authorYao Qi <yao.qi@linaro.org>2015-07-07 16:58:19 +0100
committerYao Qi <yao.qi@linaro.org>2015-07-07 16:58:19 +0100
commit607685ecee1015d6c37e0d800d40453dc0aadc8c (patch)
tree97a761af48d3545f57eff64f5fa57be9fb2c0e37 /gdb/arm-linux-nat.c
parentf1b6788884b2e95105475c95b7f22f6ceba2271e (diff)
Native debug arm program by aarch64 GDB
This patch is to let aarch64 GDB debug 32-bit arm program natively. In each function for fetching and storing registers, GDB will check gdbarch_bfd_arch_info (gdbarch)->bits_per_word, if it is 32, call the corresponding aarch32 functions in aarch32-linux-nat.c, otherwise fall back to aarch64 code to fetch and store registers. aarch64_linux_read_description has to return the right target description, but we don't have gdbarch available there, so GDB fetches auxv and gets AT_PHENT, in order to determine whether the target is 32-bit or 64-bit. I learned this trick from solib-svr4.c. gdb: 2015-07-07 Yao Qi <yao.qi@linaro.org> * aarch32-linux-nat.h (VFP_REGS_SIZE): New macro, moved from arm-linux-nat.c. * aarch64-linux-nat.c: Include aarch32-linux-nat.h and elf/external.h. (fetch_gregs_from_thread): Call aarch32_gp_regcache_supply if target is 32-bit. (store_gregs_to_thread): Call aarch32_gp_regcache_collect if target is 32-bit. (fetch_fpregs_from_thread): Call aarch32_vfp_regcache_supply if target is 32-bit. (store_fpregs_to_thread): Call aarch32_vfp_regcache_collect if target is 32-bit. (tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (aarch64_linux_read_description): Return the right target description. * arm-linux-nat.c (VFP_REGS_SIZE): Moved to aarch32-linux-nat.h. * config/aarch64/linux.mh (NATDEPFILES): Add aarch32-linux-nat.o. * configure.tgt (aarch64*-*-linux*): Add arm-tdep.o and arm-linux-tdep.o
Diffstat (limited to 'gdb/arm-linux-nat.c')
-rw-r--r--gdb/arm-linux-nat.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c
index aca046126e..f0ab98cace 100644
--- a/gdb/arm-linux-nat.c
+++ b/gdb/arm-linux-nat.c
@@ -342,11 +342,6 @@ store_wmmx_regs (const struct regcache *regcache)
}
}
-/* Fetch and store VFP Registers. The kernel object has space for 32
- 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
- VFPv3D16 target. */
-#define VFP_REGS_SIZE (32 * 8 + 4)
-
static void
fetch_vfp_regs (struct regcache *regcache)
{