Remove trailing white spaces on gas

	* app.c: Remove trailing white spaces.
	* as.c: Likewise.
	* as.h: Likewise.
	* cond.c: Likewise.
	* dw2gencfi.c: Likewise.
	* dwarf2dbg.h: Likewise.
	* ecoff.c: Likewise.
	* input-file.c: Likewise.
	* itbl-lex.h: Likewise.
	* output-file.c: Likewise.
	* read.c: Likewise.
	* sb.c: Likewise.
	* subsegs.c: Likewise.
	* symbols.c: Likewise.
	* write.c: Likewise.
	* config/tc-i386.c: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/Makefile.in: Likewise.
	* doc/c-aarch64.texi: Likewise.
	* doc/c-alpha.texi: Likewise.
	* doc/c-arc.texi: Likewise.
	* doc/c-arm.texi: Likewise.
	* doc/c-avr.texi: Likewise.
	* doc/c-bfin.texi: Likewise.
	* doc/c-cr16.texi: Likewise.
	* doc/c-d10v.texi: Likewise.
	* doc/c-d30v.texi: Likewise.
	* doc/c-h8300.texi: Likewise.
	* doc/c-hppa.texi: Likewise.
	* doc/c-i370.texi: Likewise.
	* doc/c-i386.texi: Likewise.
	* doc/c-i860.texi: Likewise.
	* doc/c-m32c.texi: Likewise.
	* doc/c-m32r.texi: Likewise.
	* doc/c-m68hc11.texi: Likewise.
	* doc/c-m68k.texi: Likewise.
	* doc/c-microblaze.texi: Likewise.
	* doc/c-mips.texi: Likewise.
	* doc/c-msp430.texi: Likewise.
	* doc/c-mt.texi: Likewise.
	* doc/c-s390.texi: Likewise.
	* doc/c-score.texi: Likewise.
	* doc/c-sh.texi: Likewise.
	* doc/c-sh64.texi: Likewise.
	* doc/c-tic54x.texi: Likewise.
	* doc/c-tic6x.texi: Likewise.
	* doc/c-v850.texi: Likewise.
	* doc/c-xc16x.texi: Likewise.
	* doc/c-xgate.texi: Likewise.
	* doc/c-xtensa.texi: Likewise.
	* doc/c-z80.texi: Likewise.
	* doc/internals.texi: Likewise.

1 files changed, 10 insertions, 10 deletions

diff --git a/gas/doc/c-d30v.texi b/gas/doc/c-d30v.texi
index 420311f474..aec7f68fa7 100644
--- a/gas/doc/c-d30v.texi
+++ b/gas/doc/c-d30v.texi
@@ -69,11 +69,11 @@ Architecture Manual.  However, the names in the manual are sometimes ambiguous.
 There are instruction names that can assemble to a short or long form opcode.
 How does the assembler pick the correct form?  @code{@value{AS}} will always pick the
 smallest form if it can.  When dealing with a symbol that is not defined yet when a
-line is being assembled, it will always use the long form.  If you need to force the 
+line is being assembled, it will always use the long form.  If you need to force the
 assembler to use either the short or long form of the instruction, you can append
-either @samp{.s} (short) or @samp{.l} (long) to it.  For example, if you are writing 
+either @samp{.s} (short) or @samp{.l} (long) to it.  For example, if you are writing
 an assembly program and you want to do a branch to a symbol that is defined later
-in your program, you can write @samp{bra.s foo}. 
+in your program, you can write @samp{bra.s foo}.
 Objdump and GDB will always append @samp{.s} or @samp{.l} to instructions which
 have both short and long forms.
 
@@ -91,8 +91,8 @@ instruction is called, it will not be packaged with the next instruction so the
 address will be valid.  Nops are automatically inserted when necessary.
 
 If you do not want the assembler automatically making these decisions, you can control
-the packaging and execution type (parallel or sequential) with the special execution 
-symbols described in the next section.  
+the packaging and execution type (parallel or sequential) with the special execution
+symbols described in the next section.
 
 @node D30V-Chars
 @subsection Special Characters
@@ -112,7 +112,7 @@ Sub-instructions may be executed in order, in reverse-order, or in parallel.
 Instructions listed in the standard one-per-line format will be executed
 sequentially unless you use the @samp{-O} option.
 
-To specify the executing order, use the following symbols: 
+To specify the executing order, use the following symbols:
 @table @samp
 @item ->
 Sequential with instruction on the left first.
@@ -250,7 +250,7 @@ Same as flag 7 (carry/borrow flag)
 @item b
 Same as flag 7 (carry/borrow flag)
 @end table
-        
+
 @node D30V-Addressing
 @subsection Addressing Modes
 @cindex addressing modes, D30V
@@ -272,7 +272,7 @@ Register indirect with pre-decrement
 @item @@(@var{disp}, R@var{n})
 Register indirect with displacement
 @item @var{addr}
-PC relative address (for branch or rep). 
+PC relative address (for branch or rep).
 @item #@var{imm}
 Immediate data (the @samp{#} is optional and ignored)
 @end table
@@ -283,7 +283,7 @@ Immediate data (the @samp{#} is optional and ignored)
 @cindex D30V floating point
 The D30V has no hardware floating point, but the @code{.float} and @code{.double}
 directives generates @sc{ieee} floating-point numbers for compatibility
-with other development tools. 
+with other development tools.
 
 @node D30V-Opcodes
 @section Opcodes
@@ -292,7 +292,7 @@ with other development tools.
 @cindex mnemonics, D30V
 @cindex instruction summary, D30V
 For detailed information on the D30V machine instruction set, see
-@cite{D30V Architecture: A VLIW Microprocessor for Multimedia Applications} 
+@cite{D30V Architecture: A VLIW Microprocessor for Multimedia Applications}
 (Mitsubishi Electric Corp.).
 @code{@value{AS}} implements all the standard D30V opcodes.  The only changes are those
 described in the section on size modifiers