MIPS/GAS: Respect the `insn32' mode in branch relaxation

Complement:

commit 833794fc12d98139fc33f6b0b85feb03471007b7
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date:   Tue Jun 25 18:02:34 2013 +0000

<https://sourceware.org/ml/binutils/2013-06/msg00104.html>, ("microMIPS
insn32 mode support"), and fix an issue with microMIPS branch relaxation
producing 16-bit instructions in the `insn32' mode.  Use equivalent
32-bit instruction sequences.

	gas/
	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `insn32' flag.
	(RELAX_MICROMIPS_INSN32): New macro.
	(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
	(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_RELAX32)
	(RELAX_MICROMIPS_TOOFAR16, RELAX_MICROMIPS_MARK_TOOFAR16)
	(RELAX_MICROMIPS_CLEAR_TOOFAR16, RELAX_MICROMIPS_TOOFAR32)
	(RELAX_MICROMIPS_MARK_TOOFAR32, RELAX_MICROMIPS_CLEAR_TOOFAR32):
	Shift bits.
	(append_insn): Record `mips_opts.insn32' with relaxed microMIPS
	branches.
	(relaxed_micromips_32bit_branch_length): Handle the `insn32'
	mode.
	(md_convert_frag): Likewise.
	* testsuite/gas/mips/micromips-branch-relax.s: Add `insn32'
	conditionals.
	* testsuite/gas/mips/micromips-branch-relax.l: Update line
	numbers accordingly.
	* testsuite/gas/mips/micromips-branch-relax-pic.l: Likewise.
	* testsuite/gas/mips/micromips-branch-relax-insn32.d: New test.
	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.d: New
	test.
	* testsuite/gas/mips/micromips-branch-relax-insn32.l: New
	stderr output.
	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.l: New
	stderr output.
	* testsuite/gas/mips/mips.exp: Run the new tests.

1 files changed, 85 insertions, 45 deletions

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index daa23d892f..5768f186b0 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1151,37 +1151,41 @@ static int mips_relax_branch;
 
    The information we store for this type of relaxation is the argument
    code found in the opcode file for this relocation, the register
-   selected as the assembler temporary, whether the branch is
-   unconditional, whether it is compact, whether it stores the link
-   address implicitly in $ra, whether relaxation of out-of-range 32-bit
-   branches to a sequence of instructions is enabled, and whether the
-   displacement of a branch is too large to fit as an immediate argument
-   of a 16-bit and a 32-bit branch, respectively.  */
-#define RELAX_MICROMIPS_ENCODE(type, at, uncond, compact, link,	\
+   selected as the assembler temporary, whether in the 32-bit
+   instruction mode, whether the branch is unconditional, whether it is
+   compact, whether it stores the link address implicitly in $ra,
+   whether relaxation of out-of-range 32-bit branches to a sequence of
+   instructions is enabled, and whether the displacement of a branch is
+   too large to fit as an immediate argument of a 16-bit and a 32-bit
+   branch, respectively.  */
+#define RELAX_MICROMIPS_ENCODE(type, at, insn32,		\
+			       uncond, compact, link,		\
 			       relax32, toofar16, toofar32)	\
   (0x40000000							\
    | ((type) & 0xff)						\
    | (((at) & 0x1f) << 8)					\
-   | ((uncond) ? 0x2000 : 0)					\
-   | ((compact) ? 0x4000 : 0)					\
-   | ((link) ? 0x8000 : 0)					\
-   | ((relax32) ? 0x10000 : 0)					\
-   | ((toofar16) ? 0x20000 : 0)					\
-   | ((toofar32) ? 0x40000 : 0))
+   | ((insn32) ? 0x2000 : 0)					\
+   | ((uncond) ? 0x4000 : 0)					\
+   | ((compact) ? 0x8000 : 0)					\
+   | ((link) ? 0x10000 : 0)					\
+   | ((relax32) ? 0x20000 : 0)					\
+   | ((toofar16) ? 0x40000 : 0)					\
+   | ((toofar32) ? 0x80000 : 0))
 #define RELAX_MICROMIPS_P(i) (((i) & 0xc0000000) == 0x40000000)
 #define RELAX_MICROMIPS_TYPE(i) ((i) & 0xff)
 #define RELAX_MICROMIPS_AT(i) (((i) >> 8) & 0x1f)
-#define RELAX_MICROMIPS_UNCOND(i) (((i) & 0x2000) != 0)
-#define RELAX_MICROMIPS_COMPACT(i) (((i) & 0x4000) != 0)
-#define RELAX_MICROMIPS_LINK(i) (((i) & 0x8000) != 0)
-#define RELAX_MICROMIPS_RELAX32(i) (((i) & 0x10000) != 0)
-
-#define RELAX_MICROMIPS_TOOFAR16(i) (((i) & 0x20000) != 0)
-#define RELAX_MICROMIPS_MARK_TOOFAR16(i) ((i) | 0x20000)
-#define RELAX_MICROMIPS_CLEAR_TOOFAR16(i) ((i) & ~0x20000)
-#define RELAX_MICROMIPS_TOOFAR32(i) (((i) & 0x40000) != 0)
-#define RELAX_MICROMIPS_MARK_TOOFAR32(i) ((i) | 0x40000)
-#define RELAX_MICROMIPS_CLEAR_TOOFAR32(i) ((i) & ~0x40000)
+#define RELAX_MICROMIPS_INSN32(i) (((i) & 0x2000) != 0)
+#define RELAX_MICROMIPS_UNCOND(i) (((i) & 0x4000) != 0)
+#define RELAX_MICROMIPS_COMPACT(i) (((i) & 0x8000) != 0)
+#define RELAX_MICROMIPS_LINK(i) (((i) & 0x10000) != 0)
+#define RELAX_MICROMIPS_RELAX32(i) (((i) & 0x20000) != 0)
+
+#define RELAX_MICROMIPS_TOOFAR16(i) (((i) & 0x40000) != 0)
+#define RELAX_MICROMIPS_MARK_TOOFAR16(i) ((i) | 0x40000)
+#define RELAX_MICROMIPS_CLEAR_TOOFAR16(i) ((i) & ~0x40000)
+#define RELAX_MICROMIPS_TOOFAR32(i) (((i) & 0x80000) != 0)
+#define RELAX_MICROMIPS_MARK_TOOFAR32(i) ((i) | 0x80000)
+#define RELAX_MICROMIPS_CLEAR_TOOFAR32(i) ((i) & ~0x80000)
 
 /* Sign-extend 16-bit value X.  */
 #define SEXT_16BIT(X) ((((X) + 0x8000) & 0xffff) - 0x8000)
@@ -7302,7 +7306,8 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
       relaxed_branch = TRUE;
       length32 = relaxed_micromips_32bit_branch_length (NULL, NULL, uncond);
       add_relaxed_insn (ip, relax32 ? length32 : 4, relax16 ? 2 : 4,
-			RELAX_MICROMIPS_ENCODE (type, AT, uncond, compact, al,
+			RELAX_MICROMIPS_ENCODE (type, AT, mips_opts.insn32,
+						uncond, compact, al,
 						relax32, 0, 0),
 			address_expr->X_add_symbol,
 			address_expr->X_add_number);
@@ -17228,14 +17233,19 @@ relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
     {
       bfd_boolean compact_known = fragp != NULL;
       bfd_boolean compact = FALSE;
+      bfd_boolean insn32 = TRUE;
       bfd_boolean uncond;
+      int short_insn_size;
 
-      if (compact_known)
-	compact = RELAX_MICROMIPS_COMPACT (fragp->fr_subtype);
       if (fragp)
-	uncond = RELAX_MICROMIPS_UNCOND (fragp->fr_subtype);
+	{
+	  compact = RELAX_MICROMIPS_COMPACT (fragp->fr_subtype);
+	  uncond = RELAX_MICROMIPS_UNCOND (fragp->fr_subtype);
+	  insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype);
+	}
       else
 	uncond = update < 0;
+      short_insn_size = insn32 ? 4 : 2;
 
       /* If label is out of range, we turn branch <br>:
 
@@ -17245,11 +17255,12 @@ relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
          into:
 
 		j	label			# 4 bytes
-		nop				# 2 bytes if compact && !PIC
+		nop				# 2/4 bytes if
+						#  compact && (!PIC || insn32)
 	    0:
        */
-      if (mips_pic == NO_PIC && (!compact_known || compact))
-	length += 2;
+      if ((mips_pic == NO_PIC || insn32) && (!compact_known || compact))
+	length += short_insn_size;
 
       /* If assembling PIC code, we further turn:
 
@@ -17259,18 +17270,18 @@ relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
 
 			lw/ld	at, %got(label)(gp)	# 4 bytes
 			d/addiu	at, %lo(label)		# 4 bytes
-			jr/c	at			# 2 bytes
+			jr/c	at			# 2/4 bytes
        */
       if (mips_pic != NO_PIC)
-	length += 6;
+	length += 4 + short_insn_size;
 
       /* If branch <br> is conditional, we prepend negated branch <brneg>:
 
 			<brneg>	0f			# 4 bytes
-			nop				# 2 bytes if !compact
+			nop				# 2/4 bytes if !compact
        */
       if (!uncond)
-	length += (compact_known && compact) ? 4 : 6;
+	length += (compact_known && compact) ? 4 : 4 + short_insn_size;
     }
 
   return length;
@@ -17835,6 +17846,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
     {
       char *buf = fragp->fr_literal + fragp->fr_fix;
       bfd_boolean compact = RELAX_MICROMIPS_COMPACT (fragp->fr_subtype);
+      bfd_boolean insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype);
       bfd_boolean al = RELAX_MICROMIPS_LINK (fragp->fr_subtype);
       int type = RELAX_MICROMIPS_TYPE (fragp->fr_subtype);
       bfd_boolean short_ds;
@@ -17982,9 +17994,15 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
 
 	  /* Branch over the jump.  */
 	  buf = write_compressed_insn (buf, insn, 4);
+
 	  if (!compact)
-	    /* nop */
-	    buf = write_compressed_insn (buf, 0x0c00, 2);
+	    {
+	      /* nop  */
+	      if (insn32)
+		buf = write_compressed_insn (buf, 0x00000000, 4);
+	      else
+		buf = write_compressed_insn (buf, 0x0c00, 2);
+	    }
 	}
 
       if (mips_pic == NO_PIC)
@@ -18000,15 +18018,19 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
 	  fixp->fx_line = fragp->fr_line;
 
 	  buf = write_compressed_insn (buf, insn, 4);
+
 	  if (compact)
-	    /* nop */
-	    buf = write_compressed_insn (buf, 0x0c00, 2);
+	    {
+	      /* nop  */
+	      if (insn32)
+		buf = write_compressed_insn (buf, 0x00000000, 4);
+	      else
+		buf = write_compressed_insn (buf, 0x0c00, 2);
+	    }
 	}
       else
 	{
 	  unsigned long at = RELAX_MICROMIPS_AT (fragp->fr_subtype);
-	  unsigned long jalr = short_ds ? 0x45e0 : 0x45c0;	/* jalr/s  */
-	  unsigned long jr = compact ? 0x45a0 : 0x4580;		/* jr/c  */
 
 	  /* lw/ld $at, <sym>($gp)  R_MICROMIPS_GOT16  */
 	  insn = HAVE_64BIT_ADDRESSES ? 0xdc1c0000 : 0xfc1c0000;
@@ -18038,11 +18060,29 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
 
 	  buf = write_compressed_insn (buf, insn, 4);
 
-	  /* jr/jrc/jalr/jalrs $at  */
-	  insn = al ? jalr : jr;
-	  insn |= at << MICROMIPSOP_SH_MJ;
+	  if (insn32)
+	    {
+	      /* jr/jalr $at  */
+	      insn = 0x00000f3c | (al ? RA : ZERO) << MICROMIPSOP_SH_RT;
+	      insn |= at << MICROMIPSOP_SH_RS;
+
+	      buf = write_compressed_insn (buf, insn, 4);
 
-	  buf = write_compressed_insn (buf, insn, 2);
+	      if (compact)
+		/* nop  */
+		buf = write_compressed_insn (buf, 0x00000000, 4);
+	    }
+	  else
+	    {
+	      /* jr/jrc/jalr/jalrs $at  */
+	      unsigned long jalr = short_ds ? 0x45e0 : 0x45c0;	/* jalr/s  */
+	      unsigned long jr = compact ? 0x45a0 : 0x4580;	/* jr/c  */
+
+	      insn = al ? jalr : jr;
+	      insn |= at << MICROMIPSOP_SH_MJ;
+
+	      buf = write_compressed_insn (buf, insn, 2);
+	    }
 	}
 
       gas_assert (buf == fragp->fr_literal + fragp->fr_fix);