Add support for the AVR Tiny series of microcontrollers.

        * archures.c: add avrtiny architecture for avr target.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): add avrtiny arch info.
	* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
	added for 16 bit LDS/STS instruction of avrtiny arch.
	(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
	BFD_RELOC_AVR_LDS_STS_16.
	(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
	(elf32_avr_object_p): set machine number for avrtiny arch.
	* libbfd.h: Regenerate.
	* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.

         * config/tc-avr.c (mcu_types): Add avrtiny arch.
	Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
	and attiny40.
	(md_show_usage): Add avrtiny arch in usage message.
	(avr_operand): validate and issue error for invalid register for avrtiny.
	add new reloc exp for 16 bit lds/sts instruction.
	(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
	(md_assemble): check ISA for arch and issue diagnostic.

	* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
	(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
	* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
	(AVR_ISA_2xxxa): define ISA without LPM.
	(AVR_ISA_AVRTINY): define avrtiny arch ISA.
	Add doc for contraint used in 16 bit lds/sts.
	Adjust ISA group for icall, ijmp, pop and push.
	Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
	* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
	(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
	is not avrtiny.

	* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
	(eavrtiny.c): add rules for avrtiny emulation source.
	* Makefile.in: Regenerate.
	* configure.tgt: Add avrtiny to avr target emulations.
	* scripttempl/avrtiny.sc: New file.
	linker script template for avrtiny arch.
	* emulparams/avrtiny.sh: New file.
	emulation parameters for avrtiny arch.

7 files changed, 137 insertions, 77 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ff972a2e92..3253c76f6f 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,21 @@
+2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
+            Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+            Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+            Soundararajan  <Sounderarajan.D@atmel.com>
+
+	* archures.c: Add avrtiny architecture for avr target.
+	* cpu-avr.c (arch_info_struct): Add avrtiny arch info.
+	* elf32-avr.c (elf_avr_howto_table): New relocation R_AVR_LDS_STS_16
+	added for 16 bit LDS/STS instruction of avrtiny arch.
+	(avr_reloc_map): Reloc R_AVR_LDS_STS_16 is mapped to
+	BFD_RELOC_AVR_LDS_STS_16.
+	(bfd_elf_avr_final_write_processing): Select machine number
+	avrtiny arch.
+	(elf32_avr_object_p): Set machine number for avrtiny arch.
+	* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
 2014-06-26  Nick Clifton  <nickc@redhat.com>
 
 	PR binutils/16949
diff --git a/bfd/archures.c b/bfd/archures.c
index 9b47504c06..44c9199adf 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -410,6 +410,7 @@ DESCRIPTION
 .#define bfd_mach_avr5		5
 .#define bfd_mach_avr51		51
 .#define bfd_mach_avr6		6
+.#define bfd_mach_avrtiny   100
 .#define bfd_mach_avrxmega1 101
 .#define bfd_mach_avrxmega2 102
 .#define bfd_mach_avrxmega3 103
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index d9056ce33f..09182cf987 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2195,6 +2195,7 @@ enum bfd_architecture
 #define bfd_mach_avr5          5
 #define bfd_mach_avr51         51
 #define bfd_mach_avr6          6
+#define bfd_mach_avrtiny   100
 #define bfd_mach_avrxmega1 101
 #define bfd_mach_avrxmega2 102
 #define bfd_mach_avrxmega3 103
@@ -4475,6 +4476,10 @@ value.  */
   BFD_RELOC_AVR_DIFF16,
   BFD_RELOC_AVR_DIFF32,
 
+/* This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
+lds and sts instructions supported only tiny core.  */
+  BFD_RELOC_AVR_LDS_STS_16,
+
 /* Renesas RL78 Relocations.  */
   BFD_RELOC_RL78_NEG8,
   BFD_RELOC_RL78_NEG16,
diff --git a/bfd/cpu-avr.c b/bfd/cpu-avr.c
index 060c9a26d9..d3da25aff1 100644
--- a/bfd/cpu-avr.c
+++ b/bfd/cpu-avr.c
@@ -67,7 +67,6 @@ compatible (const bfd_arch_info_type * a,
     return a;
   if (a->mach == bfd_mach_avr31 && b->mach == bfd_mach_avr3)
     return b;
-
   if (a->mach == bfd_mach_avr3 && b->mach == bfd_mach_avr35)
     return a;
   if (a->mach == bfd_mach_avr35 && b->mach == bfd_mach_avr3)
@@ -78,7 +77,6 @@ compatible (const bfd_arch_info_type * a,
   if (a->mach == bfd_mach_avr51 && b->mach == bfd_mach_avr5)
     return b;
 
-
   return NULL;
 }
 
@@ -135,25 +133,28 @@ static const bfd_arch_info_type arch_info_struct[] =
   /* 3-Byte PC.  */
   N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
 
-  /* Xmega 1 */
-  N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[11]),
-
-  /* Xmega 2 */
-  N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[12]),
-
-  /* Xmega 3 */
-  N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[13]),
-
-  /* Xmega 4 */
-  N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[14]),
-
-  /* Xmega 5 */
-  N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[15]),
-
-  /* Xmega 6 */
-  N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
-
-  /* Xmega 7 */
+  /* Tiny core (AVR Tiny).  */
+  N (16, bfd_mach_avrtiny, "avr:100", FALSE, & arch_info_struct[11]),
+
+  /* Xmega 1.  */
+  N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[12]),
+
+  /* Xmega 2.  */
+  N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[13]),
+  
+  /* Xmega 3.  */
+  N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[14]),
+  
+  /* Xmega 4.  */
+  N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[15]),
+  
+  /* Xmega 5.  */
+  N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[16]),
+  
+  /* Xmega 6.  */
+  N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[17]),
+  
+  /* Xmega 7.  */
   N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
 
 };
diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c
index b46a44c619..9ca0c464ee 100644
--- a/bfd/elf32-avr.c
+++ b/bfd/elf32-avr.c
@@ -33,13 +33,8 @@ static bfd_boolean debug_relax = FALSE;
 static bfd_boolean debug_stubs = FALSE;
 
 static bfd_reloc_status_type
-bfd_elf_avr_diff_reloc (bfd *abfd,
-              arelent *reloc_entry,
-              asymbol *symbol,
-              void *data,
-              asection *input_section,
-              bfd *output_bfd,
-              char **error_message);
+bfd_elf_avr_diff_reloc (bfd *, arelent *, asymbol *, void *,
+			asection *, bfd *, char **);
 
 /* Hash table initialization and handling.  Code is taken from the hppa port
    and adapted to the needs of AVR.  */
@@ -566,45 +561,59 @@ static reloc_howto_type elf_avr_howto_table[] =
 	 0xffffff,		/* src_mask */
 	 0xffffff,		/* dst_mask */
 	 FALSE),		/* pcrel_offset */
-  HOWTO (R_AVR_DIFF8,      /* type */
-     0,             /* rightshift */
-     0, 			/* size (0 = byte, 1 = short, 2 = long) */
-     8, 			/* bitsize */
-     FALSE,         /* pc_relative */
-     0,             /* bitpos */
-     complain_overflow_bitfield, /* complain_on_overflow */
-     bfd_elf_avr_diff_reloc, /* special_function */
-     "R_AVR_DIFF8",     /* name */
-     FALSE,         /* partial_inplace */
-     0,             /* src_mask */
-     0xff,          /* dst_mask */
-     FALSE),        /* pcrel_offset */
-  HOWTO (R_AVR_DIFF16,     /* type */
-     0,             /* rightshift */
-     1,			/* size (0 = byte, 1 = short, 2 = long) */
-     16,			/* bitsize */
-     FALSE,         /* pc_relative */
-     0,             /* bitpos */
-     complain_overflow_bitfield, /* complain_on_overflow */
-     bfd_elf_avr_diff_reloc, /* special_function */
-     "R_AVR_DIFF16",     /* name */
-     FALSE,         /* partial_inplace */
-     0,             /* src_mask */
-     0xffff,        /* dst_mask */
-     FALSE),        /* pcrel_offset */
-  HOWTO (R_AVR_DIFF32,    /* type */
-     0,             /* rightshift */
-     2,         /* size (0 = byte, 1 = short, 2 = long) */
-     32,        /* bitsize */
-     FALSE,         /* pc_relative */
-     0,             /* bitpos */
-     complain_overflow_bitfield, /* complain_on_overflow */
-     bfd_elf_avr_diff_reloc, /* special_function */
-     "R_AVR_DIFF32",     /* name */
-     FALSE,         /* partial_inplace */
-     0,             /* src_mask */
-     0xffffffff,    /* dst_mask */ 
-     FALSE)         /* pcrel_offset */
+  HOWTO (R_AVR_DIFF8,		/* type */
+	 0,             	/* rightshift */
+	 0, 			/* size (0 = byte, 1 = short, 2 = long) */
+	 8, 			/* bitsize */
+	 FALSE,         	/* pc_relative */
+	 0,             	/* bitpos */
+	 complain_overflow_bitfield, /* complain_on_overflow */
+	 bfd_elf_avr_diff_reloc, /* special_function */
+	 "R_AVR_DIFF8",     	/* name */
+	 FALSE,         	/* partial_inplace */
+	 0,             	/* src_mask */
+	 0xff,          	/* dst_mask */
+	 FALSE),        	/* pcrel_offset */
+  HOWTO (R_AVR_DIFF16,  	/* type */
+	 0,             	/* rightshift */
+	 1,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,         	/* pc_relative */
+	 0,             	/* bitpos */
+	 complain_overflow_bitfield, /* complain_on_overflow */
+	 bfd_elf_avr_diff_reloc,/* special_function */
+	 "R_AVR_DIFF16",     	/* name */
+	 FALSE,         	/* partial_inplace */
+	 0,             	/* src_mask */
+	 0xffff,        	/* dst_mask */
+	 FALSE),        	/* pcrel_offset */
+  HOWTO (R_AVR_DIFF32,  	/* type */
+	 0,             	/* rightshift */
+	 2,         		/* size (0 = byte, 1 = short, 2 = long) */
+	 32,        		/* bitsize */
+	 FALSE,         	/* pc_relative */
+	 0,             	/* bitpos */
+	 complain_overflow_bitfield, /* complain_on_overflow */
+	 bfd_elf_avr_diff_reloc,/* special_function */
+	 "R_AVR_DIFF32",     	/* name */
+	 FALSE,         	/* partial_inplace */
+	 0,             	/* src_mask */
+	 0xffffffff,    	/* dst_mask */
+	 FALSE),        	/* pcrel_offset */
+  /* 7 bit immediate for LDS/STS in Tiny core.  */
+  HOWTO (R_AVR_LDS_STS_16,  /* type */
+	 0,                     /* rightshift */
+	 1,                     /* size (0 = byte, 1 = short, 2 = long) */
+	 7,                     /* bitsize */
+	 FALSE,                 /* pc_relative */
+	 0,                     /* bitpos */
+	 complain_overflow_dont,/* complain_on_overflow */
+	 bfd_elf_generic_reloc, /* special_function */
+	 "R_AVR_LDS_STS_16",    /* name */
+	 FALSE,                 /* partial_inplace */
+	 0xffff,                /* src_mask */
+	 0xffff,                /* dst_mask */
+	 FALSE)                 /* pcrel_offset */
 };
 
 /* Map BFD reloc types to AVR ELF reloc types.  */
@@ -649,7 +658,8 @@ static const struct avr_reloc_map avr_reloc_map[] =
   { BFD_RELOC_AVR_8_HLO,            R_AVR_8_HLO8 },
   { BFD_RELOC_AVR_DIFF8,            R_AVR_DIFF8 },
   { BFD_RELOC_AVR_DIFF16,           R_AVR_DIFF16 },
-  { BFD_RELOC_AVR_DIFF32,           R_AVR_DIFF32 }
+  { BFD_RELOC_AVR_DIFF32,           R_AVR_DIFF32 },
+  { BFD_RELOC_AVR_LDS_STS_16,       R_AVR_LDS_STS_16}
 };
 
 /* Meant to be filled one day with the wrap around address for the
@@ -1227,6 +1237,17 @@ avr_final_link_relocate (reloc_howto_type *                 howto,
       r = bfd_reloc_ok;
       break;
 
+   case R_AVR_LDS_STS_16:
+      contents += rel->r_offset;
+      srel = (bfd_signed_vma) relocation + rel->r_addend;
+      if ((srel & 0xFFFF) < 0x40 || (srel & 0xFFFF) > 0xbf)
+        return bfd_reloc_outofrange;
+      srel = srel & 0x7f;
+      x = bfd_get_16 (input_bfd, contents);
+      x |= (srel & 0x0f) | ((srel & 0x30) << 5) | ((srel & 0x40) << 2);
+      bfd_put_16 (input_bfd, x, contents);
+      break;
+
     default:
       r = _bfd_final_link_relocate (howto, input_bfd, input_section,
 				    contents, rel->r_offset,
@@ -1439,6 +1460,10 @@ bfd_elf_avr_final_write_processing (bfd *abfd,
     case bfd_mach_avrxmega7:
       val = E_AVR_MACH_XMEGA7;
       break;
+
+   case bfd_mach_avrtiny:
+      val = E_AVR_MACH_AVRTINY;
+      break;
     }
 
   elf_elfheader (abfd)->e_machine = EM_AVR;
@@ -1529,6 +1554,10 @@ elf32_avr_object_p (bfd *abfd)
 	case E_AVR_MACH_XMEGA7:
 	  e_set = bfd_mach_avrxmega7;
 	  break;
+
+    case E_AVR_MACH_AVRTINY:
+      e_set = bfd_mach_avrtiny;
+      break;
 	}
     }
   return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
@@ -1545,9 +1574,9 @@ elf32_avr_is_diff_reloc (Elf_Internal_Rela *irel)
           || ELF32_R_TYPE (irel->r_info) == R_AVR_DIFF32);
 }
 
-/* Reduce the diff value written in the section by count if the shrinked 
-   insn address happens to fall between the two symbols for which this 
-   diff reloc was emitted. */
+/* Reduce the diff value written in the section by count if the shrinked
+   insn address happens to fall between the two symbols for which this
+   diff reloc was emitted.  */
 
 static void
 elf32_avr_adjust_diff_reloc_value (bfd *abfd,
@@ -1602,11 +1631,11 @@ elf32_avr_adjust_diff_reloc_value (bfd *abfd,
   bfd_vma end_address = symval + irel->r_addend;
   bfd_vma start_address = end_address - x;
 
-  /* Reduce the diff value by count bytes and write it back into section 
+  /* Reduce the diff value by count bytes and write it back into section
     contents. */
 
-  if (shrinked_insn_address >= start_address && 
-      shrinked_insn_address <= end_address)
+  if (shrinked_insn_address >= start_address
+      && shrinked_insn_address <= end_address)
   {
     switch (ELF32_R_TYPE (irel->r_info))
     {
@@ -1949,8 +1978,8 @@ elf32_avr_relax_section (bfd *abfd,
       bfd_vma symval;
 
       if (   ELF32_R_TYPE (irel->r_info) != R_AVR_13_PCREL
-	     && ELF32_R_TYPE (irel->r_info) != R_AVR_7_PCREL
-	     && ELF32_R_TYPE (irel->r_info) != R_AVR_CALL)
+	  && ELF32_R_TYPE (irel->r_info) != R_AVR_7_PCREL
+	  && ELF32_R_TYPE (irel->r_info) != R_AVR_CALL)
         continue;
 
       /* Get the section contents if we haven't done so already.  */
@@ -2377,7 +2406,7 @@ elf32_avr_relax_section (bfd *abfd,
 			  {
 			    Elf_Internal_Rela *rel;
 			    Elf_Internal_Rela *relend;
-              
+
 			    rel = elf_section_data (isec)->relocs;
 			    if (rel == NULL)
 			      rel = _bfd_elf_link_read_relocs (abfd, isec, NULL, NULL, TRUE);
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 3bb37260c7..9452d1207c 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2041,6 +2041,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AVR_DIFF8",
   "BFD_RELOC_AVR_DIFF16",
   "BFD_RELOC_AVR_DIFF32",
+  "BFD_RELOC_AVR_LDS_STS_16",
   "BFD_RELOC_RL78_NEG8",
   "BFD_RELOC_RL78_NEG16",
   "BFD_RELOC_RL78_NEG24",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 7f46c587e2..9a7796673d 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -4790,6 +4790,11 @@ ENUMDOC
   second symbol so the linker can determine whether to adjust the field
   value.
 ENUM
+  BFD_RELOC_AVR_LDS_STS_16
+ENUMDOC
+  This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
+  lds and sts instructions supported only tiny core.
+ENUM
   BFD_RELOC_RL78_NEG8
 ENUMX
   BFD_RELOC_RL78_NEG16