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authorAndrew Burgess <andrew.burgess@embecosm.com>2016-03-15 21:51:50 +0000
committerAndrew Burgess <andrew.burgess@embecosm.com>2016-03-21 16:44:49 +0000
commit8699fc3e88de47be12401fd366fbe1ee0c4294c7 (patch)
tree7459f723fbf2994958b03ffb5a6f524525d84381
parenta9522a2168c8233e8f15c42a32e7376c2a40ac12 (diff)
arc: Add nps400 machine type, and assembler flag.
This commit introduces the nps400 machine type as a variant of arc. There's a new flag in the assembler to select this machine type. All other changes are just adding handling of the new machine type into the relevant places. The nps400 is an arc700 variant with some vendor specific instructions added into the instruction set. This commit does not add any of the new instructions, this is just laying the groundwork for future commits. However, in preparation for these new instructions a new opcode define for nps400 has been added to include/opcode/arc.h, this new opcode define is used in the assembler and disassembler along with the existing define for arc700 such that when assembling and disassembling for nps400 the user will have access to all arc700 instructions and all the nps400 vendor extension instructions. bfd/ChangeLog: * archures.c (bfd_mach_arc_nps400): Define. * bfd-in2.h: Regenerate. * cpu-arc.c (arch_info_struct): New entry for nps400, renumber some existing entries to make space. * elf32-arc.c (arc_elf_object_p): Add nps400 case. (arc_elf_final_write_processing): Likewise. binutils/ChangeLog: * readelf.c (decode_ARC_machine_flags): Handle nps400. gas/ChangeLog: * config/tc-arc.c (cpu_types): Add nps400 entry. (check_zol): Handle nps400. include/ChangeLog: * elf/arc.h (E_ARC_MACH_NPS400): Define. * opcode/arc.h (ARC_OPCODE_NPS400): Define. opcodes/ChangeLog: * arc-dis.c (print_insn_arc): Handle nps400.
Diffstat
-rw-r--r--bfd/ChangeLog9
-rw-r--r--bfd/archures.c1
-rw-r--r--bfd/bfd-in2.h1
-rw-r--r--bfd/cpu-arc.c5
-rw-r--r--bfd/elf32-arc.c6
-rw-r--r--binutils/ChangeLog4
-rw-r--r--binutils/readelf.c3
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-arc.c3
-rw-r--r--include/ChangeLog5
-rw-r--r--include/elf/arc.h1
-rw-r--r--include/opcode/arc.h1
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/arc-dis.c4
14 files changed, 50 insertions, 2 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 2ee95c6b6a..43c9c285df 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,14 @@
2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+ * archures.c (bfd_mach_arc_nps400): Define.
+ * bfd-in2.h: Regenerate.
+ * cpu-arc.c (arch_info_struct): New entry for nps400, renumber
+ some existing entries to make space.
+ * elf32-arc.c (arc_elf_object_p): Add nps400 case.
+ (arc_elf_final_write_processing): Likewise.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
* elf32-arc.c (arc_elf_print_private_bfd_data): Remove use of
EF_ARC_CPU_GENERIC.
(arc_elf_final_write_processing): Don't bother setting cpu field
diff --git a/bfd/archures.c b/bfd/archures.c
index 12e3342f3b..7ff1e82577 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -359,6 +359,7 @@ DESCRIPTION
.#define bfd_mach_arc_arc601 4
.#define bfd_mach_arc_arc700 3
.#define bfd_mach_arc_arcv2 5
+.#define bfd_mach_arc_nps400 6
. bfd_arch_m32c, {* Renesas M16C/M32C. *}
.#define bfd_mach_m16c 0x75
.#define bfd_mach_m32c 0x78
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 13f2d6ecba..f02e2aa29b 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2174,6 +2174,7 @@ enum bfd_architecture
#define bfd_mach_arc_arc601 4
#define bfd_mach_arc_arc700 3
#define bfd_mach_arc_arcv2 5
+#define bfd_mach_arc_nps400 6
bfd_arch_m32c, /* Renesas M16C/M32C. */
#define bfd_mach_m16c 0x75
#define bfd_mach_m32c 0x78
diff --git a/bfd/cpu-arc.c b/bfd/cpu-arc.c
index 07a052b8a5..472af8d96c 100644
--- a/bfd/cpu-arc.c
+++ b/bfd/cpu-arc.c
@@ -47,8 +47,9 @@ static const bfd_arch_info_type arch_info_struct[] =
ARC (bfd_mach_arc_arc601, "ARC601", FALSE, &arch_info_struct[3]),
ARC (bfd_mach_arc_arc700, "ARC700", FALSE, &arch_info_struct[4]),
ARC (bfd_mach_arc_arc700, "A7", FALSE, &arch_info_struct[5]),
- ARC (bfd_mach_arc_arcv2, "ARCv2", FALSE, &arch_info_struct[6]),
- ARC (bfd_mach_arc_arcv2, "EM", FALSE, &arch_info_struct[7]),
+ ARC (bfd_mach_arc_nps400, "NPS400", FALSE, &arch_info_struct[6]),
+ ARC (bfd_mach_arc_arcv2, "ARCv2", FALSE, &arch_info_struct[7]),
+ ARC (bfd_mach_arc_arcv2, "EM", FALSE, &arch_info_struct[8]),
ARC (bfd_mach_arc_arcv2, "HS", FALSE, NULL),
};
diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c
index ec818524f2..488b86fccc 100644
--- a/bfd/elf32-arc.c
+++ b/bfd/elf32-arc.c
@@ -610,6 +610,9 @@ arc_elf_object_p (bfd * abfd)
case E_ARC_MACH_ARC700:
mach = bfd_mach_arc_arc700;
break;
+ case E_ARC_MACH_NPS400:
+ mach = bfd_mach_arc_nps400;
+ break;
case EF_ARC_CPU_ARCV2HS:
case EF_ARC_CPU_ARCV2EM:
mach = bfd_mach_arc_arcv2;
@@ -659,6 +662,9 @@ arc_elf_final_write_processing (bfd * abfd,
case bfd_mach_arc_arc700:
emf = EM_ARC_COMPACT;
break;
+ case bfd_mach_arc_nps400:
+ emf = EM_ARC_COMPACT;
+ break;
case bfd_mach_arc_arcv2:
emf = EM_ARC_COMPACT2;
break;
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index c71ba3f365..805c6d8138 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,5 +1,9 @@
2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+ * readelf.c (decode_ARC_machine_flags): Handle nps400.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
* readelf.c (get_machine_flags): Move arc processing into...
(decode_ARC_machine_flags): ... new function. Remove use of
EF_ARC_CPU_GENERIC, change default case from "generic arc" to
diff --git a/binutils/readelf.c b/binutils/readelf.c
index fe23d458a5..5755b6b150 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -2306,6 +2306,9 @@ decode_ARC_machine_flags (unsigned e_flags, unsigned e_machine, char buf[])
case E_ARC_MACH_ARC700:
strcat (buf, ", ARC700");
break;
+ case E_ARC_MACH_NPS400:
+ strcat (buf, ", NPS400");
+ break;
/* The only times we should end up here are (a) A corrupt ELF, (b) A
new ELF with new architecture being read by an old version of
diff --git a/gas/ChangeLog b/gas/ChangeLog
index c6aa311b44..3450988b60 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+ * config/tc-arc.c (cpu_types): Add nps400 entry.
+ (check_zol): Handle nps400.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
* config/tc-arc.c (arc_select_cpu): Remove use of
EF_ARC_CPU_GENERIC.
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 65eb0e9025..2bf7f133a2 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -342,6 +342,8 @@ static const struct cpu_type
E_ARC_MACH_ARC600, 0x00},
{ "arc700", ARC_OPCODE_ARC700, bfd_mach_arc_arc700,
E_ARC_MACH_ARC700, 0x00},
+ { "nps400", ARC_OPCODE_ARC700 | ARC_OPCODE_NPS400, bfd_mach_arc_nps400,
+ E_ARC_MACH_NPS400, 0x00},
{ "arcem", ARC_OPCODE_ARCv2EM, bfd_mach_arc_arcv2,
EF_ARC_CPU_ARCV2EM, ARC_CD},
{ "archs", ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2,
@@ -3655,6 +3657,7 @@ check_zol (symbolS *s)
end of the ZOL label @%s"), S_GET_NAME (s));
/* Fall through. */
+ case bfd_mach_arc_nps400:
case bfd_mach_arc_arc700:
if (arc_last_insns[0].has_delay_slot)
as_bad (_("An illegal use of delay slot detected at the end of the ZOL label @%s"),
diff --git a/include/ChangeLog b/include/ChangeLog
index c8d14d638e..3ac5b728ad 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,5 +1,10 @@
2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+ * elf/arc.h (E_ARC_MACH_NPS400): Define.
+ * opcode/arc.h (ARC_OPCODE_NPS400): Define.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
* elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
diff --git a/include/elf/arc.h b/include/elf/arc.h
index 47381f3608..2aed25d02c 100644
--- a/include/elf/arc.h
+++ b/include/elf/arc.h
@@ -48,6 +48,7 @@ END_RELOC_NUMBERS (R_ARC_max)
#define E_ARC_MACH_ARC600 0x00000002
#define E_ARC_MACH_ARC601 0x00000004
#define E_ARC_MACH_ARC700 0x00000003
+#define E_ARC_MACH_NPS400 0x00000007
#define EF_ARC_CPU_ARCV2EM 0x00000005
#define EF_ARC_CPU_ARCV2HS 0x00000006
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index d33b878c50..85ea735c34 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -132,6 +132,7 @@ extern const unsigned arc_num_opcodes;
#define ARC_OPCODE_ARC700 0x0002 /* ARC 700 specific insns. */
#define ARC_OPCODE_ARCv2EM 0x0004 /* ARCv2 EM specific insns. */
#define ARC_OPCODE_ARCv2HS 0x0008 /* ARCv2 HS specific insns. */
+#define ARC_OPCODE_NPS400 0x0010 /* NPS400 specific insns. */
/* CPU extensions. */
#define ARC_EA 0x0001
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d7180b3cfa..f001f03655 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+ * arc-dis.c (print_insn_arc): Handle nps400.
+
+2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
+
* arc-opc.c (BASE): Delete.
2016-03-18 Nick Clifton <nickc@redhat.com>
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 7320c9f195..aeb3ba68cf 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -132,6 +132,10 @@ print_insn_arc (bfd_vma memaddr,
switch (info->mach)
{
+ case bfd_mach_arc_nps400:
+ isa_mask = ARC_OPCODE_ARC700 | ARC_OPCODE_NPS400;
+ break;
+
case bfd_mach_arc_arc700:
isa_mask = ARC_OPCODE_ARC700;
break;
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-01 21:27:54 +0000