diff options
| author | Quentin Schulz <quentin.schulz@theobroma-systems.com> | 2022-10-05 11:40:06 +0200 |
|---|---|---|
| committer | Quentin Schulz <quentin.schulz@theobroma-systems.com> | 2022-10-18 14:26:15 +0200 |
| commit | f9a9b914afb358d95553863c133f27b76d3915e2 (patch) | |
| tree | d8f89e97765eaf4c3e9938ad78a2e654ca8c82f5 | |
| parent | f9957a3c65ff39fc66542fd1122ff18acdc57bad (diff) | |
TSD: arm64: dts: rockchip: add Eagle (WiFi+BT) support to Ringneck
The Ringneck SoM has an ESP32 connected over SDIO and running the Eagle
FW to enable WiFi 2.4GHz and Bluetooth. This adds the necessary Device
Tree nodes to enable its support.
While the second UART (UART3) is not necessary per-se for Bluetooth or
WiFi operation, it exposes the console of the Eagle FW that is also
necessary for flashing the ESP32 internal flash.
[TSD] To be upstreamed; there's some challenges around BOOT and EN pins
sharing, since the WiFi and Bluetooth interfaces should be put down
before the flashing process is started by toggling the pins from
userspace. Also, those pins need to be in a specific state in order for
the Eagle to start. For now, the EN pin is handled by the sdio pwrseq
but it's not ideal.
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index 12397755830b..dec29a75d361 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -36,6 +36,15 @@ }; }; + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + post-power-on-delay-ms = <1000>; + power-off-delay-us = <50000>; + reset-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; /* EN pin */ + }; + vcc5v0_sys: vccsys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -345,6 +354,29 @@ <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdio { + cap-sd-highspeed; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + cap-sdio-irq; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + eagle: wifi@1 { + reg = <1>; + compatible = "tsd,eagle"; + }; }; &saradc { @@ -368,6 +400,17 @@ status = "okay"; }; +/* Eagle Bluetooth */ +&uart1 { + status = "okay"; +}; + +/* Eagle UART */ +&uart3 { + pinctrl-0 = <&uart3m0_xfer>; + status = "okay"; +}; + /* Mule UCAN */ &usb_host0_ehci { status = "okay"; |